Limine paging issue

[mleks]

Hi All,

I'm new to this forum, so forgive me if my post sounds silly

I'm using the Limine bootloader and I've noticed some strange results that I don't understand.

I thought I was using 4KB pages, but when I was looking at some addresses related to PCI/NVMe, I found this:

[warn] (paging) pml4e: -> arch.x86_64.paging.PagingStructureEntry__struct_3435{ .present = true, .writable = true, .user = true, .write_through = false, .cache_disabled = false, .accessed = true, .dirty = false, .rsrvd_a = 0, .ignrd_a = 0, .restart = 0, .aligned_address_4kbytes = 523896, .rsrvd_b = 0, .ignrd_b = 0, .execute_disable = false }, ptr=arch.x86_64.paging.PagingStructureEntry__struct_3435@ffff80007fe7c800

[warn] (paging) pdpte: -> arch.x86_64.paging.PagingStructureEntry__struct_3443{ .present = true, .writable = true, .user = true, .write_through = false, .cache_disabled = false, .accessed = false, .ignrd_a = 0, .hudge = false, .ignrd_b = 0, .restart = 0, .aligned_address_4kbytes = 523892, .rsrvd_a = 0, .ignr_b = 0, .execute_disable = false }

[warn] (paging) pde: -> arch.x86_64.paging.PagingStructureEntry__struct_3448{ .present = true, .writable = true, .user = false, .write_through = false, .cache_disabled = false, .accessed = false, .ignrd_a = false, .hudge = true, .ignrd_b = 0, .restart = 0, .aligned_address_4kbytes = 1042432, .rsrvd_a = 0, .ignrd_c = 0, .execute_disable = false }, pfn=arch.x86_64.paging.PagingStructureEntry__struct_3452@ffff8000fe800000

[warn] (paging) pte: -> arch.x86_64.paging.PagingStructureEntry__struct_3452{ .present = true, .writable = true, .user = true, .write_through = true, .cache_disabled = true, .accessed = true, .dirty = true, .pat = 1, .global = true, .ignrd_a = 3, .restart = 0, .aligned_address_4kbytes = 6476066832, .rsrvd_a = 0, .ignrd_b = 4, .protection_key = 0, .execute_disable = false }, pfn= usize@ffff80200f010000

The PS(Huge) flag is set at the PD level, which means I use 2MB pages and I do not have PT level, but why?

At the same time, when I dump some `mem tlb` from qemu, e.g.

ffffffff80092000: 000000007f877000 X---A---W
ffffffff80093000: 000000007f878000 X--DA---W
ffffffff80094000: 000000007f879000 X-------W

The pages are definitely 4KB.

So, my question is, what's happening here? Or is there something I don’t know yet and need to learn?

Thanks in advance,
Maciek

[Octocontrabass]

Limine will use a mixture of different page sizes to set up its page tables. If you want only 4kB pages, you need to set up your own page tables.

[mleks]

Thank you @Octocontrabass. I came to that conclusion while I was waiting for my post to be accepted by the moderator. Thanks to that mixture, my paging code can handle all page sizes. It's not bad.