nullplan wrote:
r8d and r9d
Ok, thanks. So, would:
mov eax eax
clear the top 32 bits of rax?
If so, how about this for a 32-bit C compiler:
1. __lmcall extension to say that the 64-bit ABI is being used for this function.
2. It is assumed that bootx64.efi will be loaded below 4 GiB, and the linker will provide an image base below 4 GiB to encourage that to happen. If it doesn't happen, you would need to buy a different computer.
3. The entry to bootx64.efi should be some assembler code that ensures all high 32 bits are cleared by doing mov eax, eax and mov r8d, r8d etc
4. In the absence of a UEFI call to set up ideal paging tables, it is necessary to disable interrupts and change the paging tables to map the 4-8 GiB region to 0-4 GiB, then reenable interrupts. No negative indexes can be used until this process completes. Negative indexes are pretty rare so shouldn't be an issue. Ideally there should be a way to see if UEFI has been updated to provide a suitable call to do this automatically (or even already be set by default) so that this system-related code normally never gets exercised.
5. Compiler is now able to use the default cdecl calling convention, by using stack manipulation instead of push/pop.
6. Other than any interfacing with UEFI (which wouldn't be done on a legacy system anyway - there would be conditional execution one way or another if that environment is detected - this is all valid 80386 code.
7. The 80386 code would likely call the win32 api, and more likely the msvcrt.dll in particular. A component external to the normal application will arrange for that to be translated into something appropriate - perhaps eventually calling 64-bit UEFI.
8. The 32-bit compiler needs to be selective in what instructions it generates. There are probably some situations where push and pop can be used (where it doesn't matter if that pushes 4 bytes or 8 bytes), but it wouldn't be the norm. Scaled indexes may never be appropriate (I don't know what the rules would be). Are there any other show-stoppers? Probably not, but some of these things need to be tested before there is a high degree of confidence.
There's probably no benefit to this over using CM32, unless you don't want interrupts disabled for a lengthy period of time. But it's at least a theoretical, interesting (to some) option, that would be nice to prove is actually viable.
Anything I've missed?