Problems reading harddisk in ATA PIO pooling mode.

[danielsan]

Hello everybody, this is my first question in this forum.

I am trying to use the identify command in qemu to the hard disk (ATA PIO). My kernel is written mostly in Rust I will append the most relevant code, you can find all the OS in (https://github.com/DanielSanRocha/kecleon).
I am receiving 0xff53 from 0x1F0 (reading 16 bits) everytime I read.

My identify implementation (Rust)

Code: Select all

pub fn initialize() {
    unsafe {
        ata_wait_bsy();
        ata_wait_drq();

        let _ = memory::inb(ATA_IO, 7);

        memory::outb(ATA_IO, 0xA0, 6);

        memory::outb(ATA_IO, 0, 2);
        memory::outb(ATA_IO, 0, 3);
        memory::outb(ATA_IO, 0, 4);
        memory::outb(ATA_IO, 0, 5);

        memory::outb(ATA_IO, 0xEC, 7);

        let status = memory::inb(ATA_IO, 7);

        if status == 0 {
            panic!("Primary ATA Driver not found!");
        }

        ata_wait_bsy();

        let x2 = memory::inb(ATA_IO, 2);
        let x3 = memory::inb(ATA_IO, 3);
        let x4 = memory::inb(ATA_IO, 4);
        let x5 = memory::inb(ATA_IO, 5);

        ata_wait_bsy();

        if x2 != 0 || x3 != 0 || x4 != 0 || x5 != 0 {
            panic!("Device at 0x1F0 is not ATA!");
        }

        ata_wait_bsy();
        ata_wait_drq();

        let name = memory::kmalloc(512);
        for i in 0..=255 {
            let cc = memory::u16_inb(ATA_DATA, 0);
            *(name as *mut u16).offset(i) = cc;
        }

        screen::print_string(name, screen::VgaColor::LightGreen);
    }
}

And ata_wait_bsy, ata_wait_drq implementation (C):

Code: Select all

#define ATA_IO 0x1F0

void ata_wait_drq() {
    while(c_inb(ATA_IO + 7) & 0x40 == 0) {}
}

void ata_wait_bsy() {
    while(c_inb(ATA_IO + 7) & 0x80 != 0) {}
}

What I am doing wrong?

[Octocontrabass]

What I am doing wrong?

You were accessing memory space instead of I/O space.

ARM doesn't have separate memory and I/O spaces like x86, so you won't have this problem now that you've switched to ARM.