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So im making a little kernel all in asm, and now i am trying to make the idt. I've already looked at the code for a while but I just can't find what I'm doing wrong . Can anyone help me take a look?
Shouldn't your idt be using idt_err and idt_noerr rather than isr_err and isr_noerr? (I'm not claiming that's the only problem with your code, but it seems to be an obvious show-stopper.)
iansjack wrote:Shouldn't your idt be using idt_err and idt_noerr rather than isr_err and isr_noerr? (I'm not claiming that's the only problem with your code, but it seems to be an obvious show-stopper.)
Oh didn't see that, but isn't it wierd that i used two undifined lables there but nasm didn't even give me a warning, the code is already everything i got.
Also, the idt label should be after the align macro, else the IDT includes the alignment padding. And I would be very surprised if your macros keep working once you move the kernel beyond the 64kB range. But that is for later and not a showstopper. (Also, the routine called is the only point of differentiation between different interrupts, so you really need a different one for each interrupt, but that is also not a show-stopper right now).
Your ISRs should never start with CLI. You're already using interrupt gates, so the CPU will automatically clear EFLAGS.IF when it jumps to your ISR. If you were using trap gates instead, CLI would not prevent the CPU from handling another interrupt after jumping to the ISR but before executing the CLI instruction.
Octocontrabass wrote:
It doesn't matter since you don't have any code to access the framebuffer, but I'm curious about the significance of this number.
I am using VBE video mode, so in the bootsect i got the video mode info, and stored the video adress to the adress 0x7FFF0, probebly gonna change it after i get the idt working
Anyway my code is still now working , is there any chance that i need to use a i686 nasm? the command im currently using is nasm kernel.asm -o kernel.bin -f bin -O0 (the O0 is just to be sure that it isn't nasm that makes my code broken)
cyao1234 wrote:Anyway my code is still now working
I don't see anything else wrong with it. How do you know it's not working?
cyao1234 wrote:is there any chance that i need to use a i686 nasm?
There's no such thing.
cyao1234 wrote:(the O0 is just to be sure that it isn't nasm that makes my code broken)
NASM's optimizations won't change the behavior of the code you've posted. (And if you need to disable NASM's optimizations elsewhere, you can use the "strict" keyword to disable optimization on individual instructions instead of your whole program.)
Since you're using QEMU, have you tried adding "-d int" to see which faults are leading up to the triple fault? (You may also need to add "-accel tcg".)
Octocontrabass wrote:
(You may also need to add "-accel tcg".)
Isn't TCG used by default in QEMU ?
Cyao1234, try aligning the IDTR on a 16 byte boundary and the IDT on a 4KB boundary, I don't know if I'm right but one time in the past my IDT won't work unless I aligned it on a 4kb boundary.
devc1 wrote:
Cyao1234, try aligning the IDTR on a 16 byte boundary and the IDT on a 4KB boundary, I don't know if I'm right but one time in the past my IDT won't work unless I aligned it on a 4kb boundary.
Just did that now and it still doesn't work
Octocontrabass wrote:
Since you're using QEMU, have you tried adding "-d int" to see which faults are leading up to the triple fault?
I just did it now and it seems that the idt register is 0, which is a bit wierd since the idt is at somewhere like 0x1000, is there a few operation gap between when i can first use a int and when i define the idt? Also the whole debug log is here https://github.com/cheyao/AsmOS
This is a special BIOS area that may not contain real RAM, try setting the stack pointer to something like 0x20000 instead, this will fix some further problems (not essentially the IDT one).