A problem when enabling xapic and x2apic

[michael]

When I use these codes to enable xapic and x2apic:

Code: Select all

__asm__ __volatile__(
		"movq $0x1b,%%rcx	\n\t"
		"rdmsr				\n\t"
		"or $0xc00,%%rax	\n\t"
		"wrmsr			\n\t"
		//"wrmsr	\n\t"
		"movq $0x1b,%%rcx	\n\t"
		"rdmsr				\n\t"
		:"=a"(x),"=d"(y)
		:
		:"memory");

everything goes well at first. But after I remove the annotation mark before the second "wrmsr", it turns me a general protection fault with error code 0xe0.
I'm sure my simulator(Bochs x86 Emulator 2.6) support apic, xapic, and x2apic, and I have no idea why it happens.

[Octocontrabass]

Your inline assembly clobbers RCX without telling the compiler.

But why are you doing all of that in inline assembly? Do you really write a bunch of inline assembly every time you need to read or write a MSR? You could be doing something like this instead:

Code: Select all

inline uint64_t rdmsr( uint32_t msr )
{
    uint32_t low;
    uint32_t high;
    asm volatile ( "rdmsr" : "=a"(low), "=d"(high) : "c"(msr) : "memory" );
    return ((uint64_t)high << 32) | low;
}

inline void wrmsr( uint32_t msr, uint64_t val )
{
    asm volatile ( "wrmsr" :: "a"((uint32_t)val), "d"((uint32_t)(val >> 32)), "c"(msr) : "memory" );
}

uint64_t enable_x2apic( void )
{
    wrmsr( 0x1b, rdmsr( 0x1b ) | 0xc00 );
    return rdmsr( 0x1b );
}

[kzinti]

Code: Select all

inline uint64_t rdmsr( uint32_t msr )
{
    uint32_t low;
    uint32_t high;
    asm volatile ( "rdmsr" : "=a"(low), "=d"(high) : "c"(msr) : "memory" );
    return ((uint64_t)high << 32) | low;
}

I don't think you need the "memory" clobber on this one... Or are there cases where reading a MSR will change memory?

[Octocontrabass]

I don't know of any cases where reading a MSR could change memory, but I can think of cases where you might want a compiler memory barrier.

If you're sure you don't need the memory clobber, you can remove it.

[kzinti]

but I can think of cases where you might want a compiler memory barrier.

Do you have any examples?

[Octocontrabass]

Reading counters using RDMSR. I don't know why you would want to do that instead of RDTSC/RDPMC, but it's an option.

[kzinti]

So then it sounds like there is no need for the memory barriers either.