Thanks for the advice, it was simpler to track the issue.nullplan wrote:A page table entry is essentially just the physical address of the next page table or the page with a few bits ORed in, so just print it in hex.
Whenever I attach a new page I assign the address of the next entry-level to an entry and then to populate that entry-level I retrieve it back with bit-shifting. This was the part I was doing wrong.
My code was:
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uint64_t* pdp = (uint64_t*)((pml4[pml4_offset] & PML_ADDRESS >> 12));
Kinda.
Now `info mem` returns some readable results, but they are for the most part wrong. Some pages have only the read flag and not the write and most of them are with a totally wrong size:
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0000000000200000-0000000000400000 0000000000200000 -rw
0000000003c00000-0000000003e00000 0000000000200000 -rw
0000000004400000-0000000004600000 0000000000200000 -rw
0000000004a05000-0000000004a06000 0000000000001000 -r-
0000000004a07000-0000000004a08000 0000000000001000 -rw
0000000004a08000-0000000004a0b000 0000000000003000 -r-
0000000004a0c000-0000000004a0d000 0000000000001000 -rw
0000000004a0f000-0000000004a10000 0000000000001000 -r-
0000000004a10000-0000000004a11000 0000000000001000 -rw
0000000004a12000-0000000004a13000 0000000000001000 -r-
0000000004a14000-0000000004a15000 0000000000001000 -rw
0000000004a15000-0000000004a16000 0000000000001000 -r-
0000000004a19000-0000000004a1c000 0000000000003000 -r-
0000000004a1e000-0000000004a20000 0000000000002000 -rw
0000000004a25000-0000000004a27000 0000000000002000 -r-
...
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for(uint64_t i = 0; i < memorySize / 1024; i += 2) // size in KB
paging_attach_2mb_page(paging_data, i * 0x200000, i * 0x200000); // pml4_addr, physical, virtual