I have the IST stacks set up in my TSS:
Code: Select all
void cpu::tss::tss_install(int num_cpu, uint64_t stack) {
isr_stack = (memory::paging::allocation::request_page() + 0x1000);
irq_stack = (memory::paging::allocation::request_page() + 0x1000);
sgi_stack = (memory::paging::allocation::request_page() + 0x1000);
uint64_t tss_base = (uint64_t)&s_tss_descriptors[num_cpu];
memory::operations::memset((void *)tss_base, 0, sizeof(cpu::tss::tss_t));
cpu::gdt::gdt_install_tss(tss_base, sizeof(cpu::tss::tss_t));
s_tss_descriptors[num_cpu].rsp[0] = stack;
s_tss_descriptors[num_cpu].io_map = sizeof(cpu::tss::tss_t);
s_tss_descriptors[num_cpu].ist[0] = (uint64_t)isr_stack;
s_tss_descriptors[num_cpu].ist[1] = (uint64_t)irq_stack;
s_tss_descriptors[num_cpu].ist[2] = (uint64_t)sgi_stack;
cpu::tss::load_tss(0x28);
}
Code: Select all
void idt_set(uint8_t number, uint64_t base, uint16_t selector, uint8_t flags) {
/* Set Base Address */
idt_s[number].baseLow = base & 0xFFFF;
idt_s[number].baseMid = (base >> 16) & 0xFFFF;
idt_s[number].baseHigh = (base >> 32) & 0xFFFFFFFF;
/* Set Selector */
idt_s[number].selector = selector;
idt_s[number].flags = flags;
/* Set IST */
if (number < 32)
idt_s[number].reservedIst = 1;
else if (number < 48)
idt_s[number].reservedIst = 2;
else
idt_s[number].reservedIst = 3;
/* Set Reserved Areas to Zero */
idt_s[number].reserved = 0;
}
What am I missing?
I am pretty sure my TSS is valid, because I can switch context to/fro the kernel without the ISTs in the interrupts.