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; Common IRQ code. Identical to ISR code except for the 'call'
irq_common_stub:
pusha
mov ax, ds
push eax
mov ax, 0x10
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
cld
push esp
call IRQHandler ; Different than the ISR code
pop eax
pop eax
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
popa
add esp, 8
sti
iret
One other change I made here was the use of EAX like that of the ISR common stub. Using EBX instead of EAX doesn't get you anything so I changed it to EAX compared with the code you have in Github.
Last edited by MichaelPetch on Mon Oct 19, 2020 1:26 pm, edited 1 time in total.
Someone else mentioned this previously on here. ISRs don't come in on the PIC so don't send any EOIs to the PIC. As well when doing the IRQ handlers you have part of the EOI processing before and after the IRQ handler. To start with to simplify things I would place the EOI processing after you call the IRQHandler. The code should look like:
Thanks for your help, Petch. I am no longer being spammed with general protection faults. I do believe my exception handlers were causing these issues, which in turn, since the exceptions were spamming, it triggered spams of GPFs. My real issue has shown itself to be invalid opcode exceptions. I will be working to find the faulty line of code.