ARM MMU Large descriptor problems

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electrodeyt
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Joined: Sun Jun 25, 2017 10:00 am

ARM MMU Large descriptor problems

Post by electrodeyt »

Hello, i was trying to set up a fairly simple translation table (not one of the memory layout i will probably use, just a basic test one) that identity maps 0x80000000 and above with 1gb blocks (so only 1 table). However when enabling the MMU i get into a nice loop of prefetch aborts as the cpu cannot access any ram anywhere for some reason.
I have already checked the aligment of the table (i already made a very simple page allocater, so i looped that until i get the correct alignment, not anywhere near ideal but when it works i can make it better). My start.s sets the not-secure bit on boot. Using GDB with qemu i have already confirmed the registers get set correctly.
GDB dump of the first 4 entries of the translation table:

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0x800f8000:     0x00000000 // base of translation table
0x800f8004:     0x00000000
0x800f8008:     0x00000000
0x800f800c:     0x00000000
0x800f8010:     0x00000000 // block 2
0x800f8014:     0x80000441
0x800f8018:     0x00000000 // block 3
0x800f801c:     0xc0000441
and relavent (i think) registers: (before enabling mmu by setting bit 0 in sctlr)

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TTBCR          0x80000000
TTBR0          0x800f8000 // maybe i am missing a bit here?
SCTLR          0xc50078
I'm similar to a jack of all trades. I'm a starter of projects, finisher of none.
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bzt
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Re: ARM MMU Large descriptor problems

Post by bzt »

Hi,

Read the ESR_ELx register and use the ARM DDI0487D documentation to decode it. It will tell you exactly what's wrong and here.
Here's a simple exception handler that (partially) decodes the ESR register when paging error happens.

Cheers,
bzt
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