x2APIC question

[Ethin]

Just reading the Intel SDMs, volume 3A, ch. 10, on the APIC. I have a question that I can't seem to find an answer to - if I have an IDT loaded, will the processor call these interrupts when the x2APIC fires them, without me needing to change the interrupt routines or mapping them somewhere else? I can disable the PIC, verify that the APIC is enabled and switch to x2APIC mode, but I don't want mu interrupts getting suddenly broken because I forgot something.

[nullplan]

The x2APIC is merely an interrupt controller. It does not change how the CPU handles interrupts, only how it receives them. The IDT is therefore unaffected.

[Ethin]

Thanks. Now I just need to figure out how to get QEMU to emulate it...

[pvc]

QEMU virtualizes x2APIC mode when using KVM (-enable-kvm option). I think, your host CPU has to support x2APIC (which is about guaranteed these days) for this to work. But beware. GDB stub is not very reliable when using KVM.

[Ethin]

I'd use KVM, but I'm trying to find a way to get it to emulate it on all platforms. For some reason, HAXM (on Windows) causes an immeduate VCPU shutdown request for some reason, and I can't find any way of locating HAXM logs. And WHPX doesn't want to work for some reason (even though I have it enabled in windows features). It might be because I disabled it at boot (mainly so windows wouldn't cause pretty much every other VM solution to fail to run properly).

[bzt]

I'd use KVM, but I'm trying to find a way to get it to emulate it on all platforms.

Try

Code: Select all

-cpu IvyBridge,+x2apic

This works for me, however I'm using KVM too, haven't disabled x2APIC at boot, and I'm running qemu under Linux. You could also try VirtualBox, it supports x2APIC emulation as well.

Cheers,
bzt

[bookman]

XV6 for x86 is a good reference, it supports xAPIC, and does not support x2APIC