Hi! Could anyone explain me a method that bios use for disable selected logical processor?
I didn't found any information about it.
Need information about multiple-processor management in Bios
Re: Need information about multiple-processor management in
Hi,
To stop a logical CPU; you'd disable and then flush caches; then disable IRQs with CLI; and then you'd either do HLT or MONITOR then MWAIT. This (almost) puts the CPU into a "do nothing forever" state where the only things that can wake it from this state is an INIT IPI (the first part of the "INIT, SIPI, SIPI" startup sequence), an SMI, an NMI or a machine check exception. Of course you'd also make sure machine check exceptions are disabled so they won't happen, and (at least for BIOS) would mask SMI and NMI sources so they won't happen either. Also, hopefully the BIOS would put the CPU into its "lowest power consumption" state before stopping the CPU (or when stopping the CPU if MONITOR/MWAIT was used); so that it consumes the least power to do nothing.
Depending on why the BIOS was stopping a CPU (e.g. if the CPU was faulty, or "disabled" because hyper-threading was turned off), it might also not mention the CPU in ACPI tables (and MultiProcessor tables) so that operating systems don't know the CPU exists and won't try to re-start the CPU. This is one of the reasons why an operating system should never broadcast the "INIT, SIPI, SIPI" sequence to all CPUs (it might start faulty CPUs that should not be started or used).
Note that there might or might not be CPU specific/model specific things and/or motherboard specific things on top of this. For a random theoretical example (which doesn't really exist in practice because almost no real hardware has ever supported it); if a system supports "hot-plug CPUs" (and if the entire chip is being disabled and not just one of its logical CPU or on of its cores) then the motherboard would probably have some way to (electrically) disconnect the CPU so that it can be removed safely.
Cheers,
Brendan
In general...XBear wrote:Hi! Could anyone explain me a method that bios use for disable selected logical processor?
I didn't found any information about it.
To stop a logical CPU; you'd disable and then flush caches; then disable IRQs with CLI; and then you'd either do HLT or MONITOR then MWAIT. This (almost) puts the CPU into a "do nothing forever" state where the only things that can wake it from this state is an INIT IPI (the first part of the "INIT, SIPI, SIPI" startup sequence), an SMI, an NMI or a machine check exception. Of course you'd also make sure machine check exceptions are disabled so they won't happen, and (at least for BIOS) would mask SMI and NMI sources so they won't happen either. Also, hopefully the BIOS would put the CPU into its "lowest power consumption" state before stopping the CPU (or when stopping the CPU if MONITOR/MWAIT was used); so that it consumes the least power to do nothing.
Depending on why the BIOS was stopping a CPU (e.g. if the CPU was faulty, or "disabled" because hyper-threading was turned off), it might also not mention the CPU in ACPI tables (and MultiProcessor tables) so that operating systems don't know the CPU exists and won't try to re-start the CPU. This is one of the reasons why an operating system should never broadcast the "INIT, SIPI, SIPI" sequence to all CPUs (it might start faulty CPUs that should not be started or used).
Note that there might or might not be CPU specific/model specific things and/or motherboard specific things on top of this. For a random theoretical example (which doesn't really exist in practice because almost no real hardware has ever supported it); if a system supports "hot-plug CPUs" (and if the entire chip is being disabled and not just one of its logical CPU or on of its cores) then the motherboard would probably have some way to (electrically) disconnect the CPU so that it can be removed safely.
Cheers,
Brendan
For all things; perfection is, and will always remain, impossible to achieve in practice. However; by striving for perfection we create things that are as perfect as practically possible. Let the pursuit of perfection be our guide.
Re: Need information about multiple-processor management in
Thank you for your answer.But I still have some doubt..
If I understood you right, there is only one real exist way to disable logical cpu. I mean disable interrupts, caches and make hlt loop.
As you say it is still possible to wake up halted processor by INIT SIPI SIPI.During my research I disabled logical cpu in bios and after sending broadcast INIT SIPI I had not got answer.
If I understood you right, there is only one real exist way to disable logical cpu. I mean disable interrupts, caches and make hlt loop.
As you say it is still possible to wake up halted processor by INIT SIPI SIPI.During my research I disabled logical cpu in bios and after sending broadcast INIT SIPI I had not got answer.
Where can I found information about it? In my case (Intel X99 chipset), there is no mentions about management cpu cores in official datasheet.Brendan wrote: Note that there might or might not be CPU specific/model specific things and/or motherboard specific things on top of this.
Re: Need information about multiple-processor management in
Why would you disable the cache? To prevent cache coherency errors when you re-online the CPU after write-back pages changed to write-combining in the meantime? That is basically the only reason that I see why you would want to do that?Brendan wrote:To stop a logical CPU; you'd disable and then flush caches [...]
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Re: Need information about multiple-processor management in
Hi,
Note that for some cases (e.g. faulty CPUs, especially if its cache is faulty, and if you're taking a CPU offline in preparation for physical removal) this would be a necessity; but for other cases (e.g. just taking a CPU offline for a little while to save power) you might consider it optional (as long as you bring the CPU back online if/when MTTRs are changed).
Cheers,
Brendan
I think that for most Intel CPUs (including things like the memory controller, etc. in recent Intel chips) there's a corresponding "BIOS Writer's Guide" that contains information that isn't available to the general public (where you need to be a company and may need to be some kind of partner/affiliate and probably need to sign an NDA just to look at these documents).XBear wrote:Where can I found information about it? In my case (Intel X99 chipset), there is no mentions about management cpu cores in official datasheet.Brendan wrote:Note that there might or might not be CPU specific/model specific things and/or motherboard specific things on top of this.
If/when you modify MTRRs you're supposed to follow a special sequence to make sure MTRRs are the same on "all" CPUs (and if you don't you can break cache coherency and risk data corruption). What Intel doesn't clearly say is that you can cheat - if a CPU's caches are disabled (and any/all of its cache's contents flushed), then its MTRRs are irrelevant and you don't need to make sure its MTTRs are the same as the "still enabled" CPUs' MTRRs (but if the CPU is re-enabled you would have to update its MTRRs before enabling its caches).Korona wrote:Why would you disable the cache? To prevent cache coherency errors when you re-online the CPU after write-back pages changed to write-combining in the meantime? That is basically the only reason that I see why you would want to do that?Brendan wrote:To stop a logical CPU; you'd disable and then flush caches [...]
Note that for some cases (e.g. faulty CPUs, especially if its cache is faulty, and if you're taking a CPU offline in preparation for physical removal) this would be a necessity; but for other cases (e.g. just taking a CPU offline for a little while to save power) you might consider it optional (as long as you bring the CPU back online if/when MTTRs are changed).
Cheers,
Brendan
For all things; perfection is, and will always remain, impossible to achieve in practice. However; by striving for perfection we create things that are as perfect as practically possible. Let the pursuit of perfection be our guide.
Re: Need information about multiple-processor management in
Hi,
the OP's message is ambiguous. Could mean that he wants to know what the BIOS does if you disable a core in the setup program. In that case, the simplest thing to do is not start it.
After a reset all CPU cores in the system (even across packages) will determine a bootstrap processor (BSP). The protocol is supposed to guarentee exactly one BSP. Which they could do by just always using CPU number 0 as BSP, but I suppose you might want to be able to disable that. The BSP will then start like the 8086 did so long ago, while all the other processors, called Application Processors (APs) will hang themselves into a state where they are only receptive to INIT IPIs (or, in case of at least some systems supported by coreboot, start anyway and get stopped in a CLI-HLT loop). From that point on, only one CPU runs in the system.
The only evidence that a starting OS has of other APs existence is the MADT (or on older systems, the MP table). And the BIOS can just not mention a given CPU.
That is also why you should never send INIT IPIs in delivery mode "to every LAPIC except me", because you might wake up a disabled core that way. And it might have been disabled for a reason.
Ciao,
Markus
the OP's message is ambiguous. Could mean that he wants to know what the BIOS does if you disable a core in the setup program. In that case, the simplest thing to do is not start it.
After a reset all CPU cores in the system (even across packages) will determine a bootstrap processor (BSP). The protocol is supposed to guarentee exactly one BSP. Which they could do by just always using CPU number 0 as BSP, but I suppose you might want to be able to disable that. The BSP will then start like the 8086 did so long ago, while all the other processors, called Application Processors (APs) will hang themselves into a state where they are only receptive to INIT IPIs (or, in case of at least some systems supported by coreboot, start anyway and get stopped in a CLI-HLT loop). From that point on, only one CPU runs in the system.
The only evidence that a starting OS has of other APs existence is the MADT (or on older systems, the MP table). And the BIOS can just not mention a given CPU.
That is also why you should never send INIT IPIs in delivery mode "to every LAPIC except me", because you might wake up a disabled core that way. And it might have been disabled for a reason.
Ciao,
Markus
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