Code: Select all
* Set up IRQ1 with interrupt controller.
* Set interrupt handler for IRQ_BASE [currently 32] + 1.
* Enable interrupts with sti.
while(true) {
asm("hlt");
}
On my test machine, however, a HP Pavilion (zv5000 as written on all the labels, zv5200 as reported by the system), the IRQ is generated, but the interrupt handler receives the pushed RIP value with the upper 32 bits zeroed, which, of course, causes an issue when returning from the handler as my kernel is positioned in the upper parts of the address space so that the first 32 bits are all 1s.
I've done some experiments, trying to find what the source of this may be:
- Perhaps most importantly, this does not occur when the loop is empty or a pause instruction. It only fails when the loop is a hlt.
- This issue does not occur for other IRQs which I've tested, the PIT IRQ0 and RTC IRQ8.
- This issue does not occur when firing the interrupt manually with the int instruction.
- This/similiar issues do not occur in plain 32-bit protected mode.
- The issue occurs whether I set up IRQ1 through the PIC or APIC. It is not affected by the APIC system being initialized or not.
