model specific registers's realted questions

[elad]

1)what happens when tring to modifiing the Time Stamp Counter or the Performance Counter registers using WRMSR ? , does their bits even change ? , does an exeption is raised ? how can I change their values if I wanted to ?

2)What are the 'MCA Extended State Registers' (index 0x180 - 0x197), are they just another way to access the general perpuse registers?

3)Does modifing the 'mpref' register(Index 0xe7) actually modifing the proccessor's frequency?


Sources:
http://sandpile.org/x86/msr.htm
http://wiki.osdev.org/Model_Specific_Registers

[Brendan]

Hi,

1)what happens when tring to modifiing the Time Stamp Counter or the Performance Counter registers using WRMSR ? , does their bits even change ? , does an exeption is raised ? how can I change their values if I wanted to ?

You'd change their values by writing to them (using the WRMSR instruction).

2)What are the 'MCA Extended State Registers' (index 0x180 - 0x197), are they just another way to access the general perpuse registers?

They would contain the values that were in various registers when a machine check exception occurred (e.g. when the last hardware failure occured) and wouldn't contain the values that are currently in those registers.

3)Does modifing the 'mpref' register(Index 0xe7) actually modifing the proccessor's frequency?

No. For some CPUs (most Intel CPUs?) if you write any value to this MSR the time stamp counter is set to zero (regardless of which value you wrote) and it has no effect on CPU frequency.

Note that all of these are Model Specific Registers, which means that they're model specific, and may not exist and/or may have completely different behaviour on different CPUs.

Also; I'd strongly recommend using Intel's manuals for MSRs on Intel's CPUs and AMD's manuals for MSRs on AMD CPUs; and NOT using recycled information from any other source (sandpile, our wiki) for anything more than a quick introduction.


Cheers,

Brendan