Paging Problem

[prajwal]

Is it necessary to Have the Mapping for the Pages allocated for Page Table itself...

Ok.... let me explain in more detail...

Paging is enabled.... the Kernel as a whole is using one Page Table
Intel 386 Paging is used here....

Now a Process is created by allocating some pages and the Process uses its own Page Table

lets say the size of the process is 200 Bytes....

So one page is suffici....
Now 1 Page for PDE
1 page for PTE
1 page for Process is required

Now is it required to have mapping for first 2 pages allocated for PDE and PTE
in PDE and PTE...? Or is it sufficient to have mapping for 3rd page allocated for process... ?

ofcourse, the process created is not accessing its PDE and PTE in code.... and mapping for
these all pages is present in PDE & PTE of the kernel....

[mrd]

Is it necessary to Have the Mapping for the Pages allocated for Page Table itself...

The only time it's necessary to have a page mapping is when you want to successfully execute instructions which contain address references to the page you wish to access.

The processor doesn't need a mapping to page tables for the MMU to access them during address translation. This is why all addresses which configure the paging structures, from PDBR(CR3) on down specify physical and not linear addresses.

[Da_Maestro]

All page tables are referenced using physical memory, so you do not need to map memory for the page tables themselves. However it is advisable that you map the physical memory that contains the page tables somewhere in virtual memory, or you won't be able to change your page tables!

Adam

[prajwal]

Ok... thats great! thankx