IDT IS NOT WORKING AFTER STRENUOUS EFFORT

[interruption]

Hello.

I have written a idt that links to an isr handler for (only) the first 32 exception handlers. Only that when I raise an exception, it shuts down.

Here are my steps in setting up idt:
- make a space ("idt") with 2048 bytes in it.
- make an pointer ("idtptr") with size and location
- make a function that loads a single entry into idt ("load_idt_entry")
- make a looping function ("load_isrs") that creates 32 entries with a common base ("isr_handler")
- this handler literally just states that "An exception occurred. [...]" and halts the processor (to show me the message) (and this will be changed in the future)
- after we have called load_isrs, then we "lidt" our idtptr
- then I raise an exception by dividing by 0, but the processor shuts down

My load_idt_entry and load_isrs are working as expected (I. at one point. printed the entire idt (the first entries) to test this theory).

The only thing that I can think of is that my offset is funky (in load_idt_entry)
Of course, a million other things could/are happen, thus I am coming to you guys to help me with this.

The "sti" and "int" instructions also don't work (int should raise an exception because I don't have software interrupts, and sti should NOT CRASH)

I do not do any other handlers at this point in time.

My source code is attached as a file, I know it's ugly, but the GDT and protected mode work (at least as far as my knowledge goes, in other words, the computer passes the printed breakpoints).

I would appreciate any help (or at least a direction to help that does not involve reading the entire set of Intel manuals, I hope).

[interruption]

PS: I also know my print function does not entirely work, but
I REALLY DON'T CARE.

It works enough.

Please help me with the idt. I can fix that myself.

PPS: "print_4_length" was for printing the idt. ignore it.

[SpyderTL]

Bochs is a great tool for tracking down these types of issues. It will tell you exactly what is wrong with your IDT/GDT, and what every register and table contains when your CPU resets due to a triple fault.

If you can post the messages that bochs gives you when it fails, we can probably tell you what your problem is.

What VM are you using? Or are you trying to develop on real hardware?

[alexfru]

I have written a idt that links to an isr handler for (only) the first 32 exception handlers. Only that when I raise an exception, it shuts down.
...
I would appreciate any help (or at least a direction to help that does not involve reading the entire set of Intel manuals, I hope).

It shuts down because of a triple fault. The triple fault is an exception that occurs while trying to deliver a double fault exception. The double fault exception (#DF), as you may have guessed, is an exception that occurs while trying to deliver some other exception. Specifically, since you're not using page translation, both exceptions must be in the "contributory" class:

• Divide Error
• Invalid TSS
• Segment Not Present
• Stack Fault
• General Protection

You don't involve TSS. You seem to trigger #DE on purpose. And then things start going wrong. It is possible that your IDTR/IDT is wrong and so no exception or interrupt can be handled at all.

Doublecheck your load_idt_entry subroutine. Does it create proper IDT entries? Right values in right bytes? I mean it.

My load_idt_entry and load_isrs are working as expected (I. at one point. printed the entire idt (the first entries) to test this theory).

You may be expecting something wrong. Open the manual, where it describes the format of IDT entries.

[Schol-R-LEA]

EDIT: Never mind, I see the boot signature now. It wasn't clear at first that this was actually two different source files concatenated into a single file for the purposes of posting it. I will keep the rest of the post to maintain a record of it in case anyone saw it before I edited it, but the details of the questions have been answered, so you can safely ignore it.

Taking a look at the code as it is, I have to wonder how it works at all. It looks as if you are doing this all inside the bootloader, given that you have the ORG set to 0000:7C00, but... that can't possibly be right, because there is no boot loader signature at byte 510, and the code defines a 4096 byte space at the end well past the end of the boot block. The BIOS shouldn't even be able to load this. Am I reading this wrong?


I can only assume that there is something I have overlooked, or something you haven't told us. I am guessing the former, but to address the latter, you might want to give us more details about this is intended to work.

If this is indeed the boot block, then this is, at best, a bad way to do this. Trying to set up p-mode in the boot block, while not outright impossible, is far more trouble than it is worth. You really would be better off loading a second-stage boot loader and doing the setup in that, if only because you won't be looking at the 512 byte limits of the boot block.

[interruption]

This is one source code file that contains the bootloader and the 'kernel'. That is how I am compiling it: manually separating the bootloader from the kernel (times $-$$ db 0 or whatever, that is to buffer the bootloader appropriately so that it is 510, and then add "55AA"), or the loaded portion, and then compiling as a flat binary (I KNOW IT IS BAD. I will eventually get to making a linker script). The transition from bootloader to kernel happens right after i do "lgdt" and jump to a label named "clear". I am in very comfortable range of the bootloader's capacity.

I also have a giant comment over the transition that says "BOOTLOADER" to make it visible.

[interruption]

Specifically, since you're not using page translation, both exceptions must be in the "contributory" class:

What do these two words mean? The first one I guess has something to do with paging and the segments (never looked into that), and the second one (contributory class of exceptions?) I have no idea.

Doublecheck your load_idt_entry subroutine. Does it create proper IDT entries? Right values in right bytes? I mean it.

An IDT entry consists of:

first word of data: lower part of offset/base/whatever your callback function is
second word: descriptor
thrid word: null byte + flags (my flags are 10001110B)
fourth word: upper part of offset/whatever

Either that or the people that created Intel Duos played a bad joke on us.

Is there anything else that you can think of? I appreciate the help.

[interruption]

Bochs is a great tool for tracking down these types of issues. It will tell you exactly what is wrong with your IDT/GDT, and what every register and table contains when your CPU resets due to a triple fault.

That would be grand if I could actually get Bochs to work...

Only I don't know how to mount an .img on windows 10 (my dev environment), and I don't want to spend any more unnecessary time on this (I have high school and such).

If you could have a detailed procedure or provide a link that would be good.

[gerryg400]

Bochs is a great tool for tracking down these types of issues. It will tell you exactly what is wrong with your IDT/GDT, and what every register and table contains when your CPU resets due to a triple fault.

That would be grand if I could actually get Bochs to work...

Only I don't know how to mount an .img on windows 10 (my dev environment), and I don't want to spend any more unnecessary time on this (I have high school and such).

If you could have a detailed procedure or provide a link that would be good.

You don't want to spend any more unnecessary time on this but you're asking others to do just that. That's a 'no' from me.

[interruption]

You don't want to spend any more unnecessary time on this but you're asking others to do just that. That's a 'no' from me.

It's your discretion.

I am not forcing you to do anything.

I am just asking if anybody knew/cared/wanted too because I have been butting my head for a month on this problem (although I know that comes with the challenge☻).

I respectfully ask if anyone has happened on a similar problem, and how they solved it.

Sorry for the phrasing.

[interruption]

Also, some (perhaps most) of you all have been at this for years if not decades.

I started this trek a few months ago.

I would assume that you are more efficient at recognizing common mistakes and errors than me, a novice.

Anyway, I came here because I am basically absolutely stumped. I have appreciated all help and posts and would be overjoyed if you guys could maybe point me in the right direction with this.

Sincerely, Daniel Moylan

[alexfru]

The subroutine that populates an IDT entry has approx. three bugs. So far you have failed to cross-check the code with the CPU manual and identify at least one of them.

[alexfru]

In the following

Code: Select all

		mov al, byte [esi+2]				
		mov [edi], byte al
		inc edi
		mov al, byte [esi+3]				
		mov [edi], byte al
		inc edi

why are there +2 and +3? Aren't you supposed to use bits 0 through 15 of the ISR address/offset? Are those in bytes 2 and 3?

Also, isn't the following a memory read

Code: Select all

		mov al, byte [esi+2]				

? If it is, what's its purpose? Are you copying instructions of the ISR into the IDT? If you are, why?

In the following

Code: Select all

		mov [edi], byte 0
		inc edi
		mov [edi], byte 08H
		inc edi

what's the selector stored in the IDT entry? Is it 8 or is it 800H? Have you noticed that the x86 CPU is little-endian or is it new information to you?

The following has the same problem as in its counterpart with +2 and +3.

Code: Select all

		mov al, byte [esi]				
		mov [edi], byte al
		inc edi
		mov al, byte [esi+1]
		mov [edi], byte al
		inc edi

Do I need to remind that little-endianness applies here as well?

Exactly what was your "STRENUOUS EFFORT"?

[SpyderTL]

Bochs is just a program that you can download and install and run like any other program. Then you just browse for your ISO or floppy or hard disk image, and click the run button. It's actually pretty easy to use.

[Schol-R-LEA]

I have the sense that feelings are running a little hot here; let's all try to be a bit calmer, please?

To clarify what SpyderTL said, the image files used by Bochs are ordinary files in the host system, so they don't need to be mounted as separate drive images. Rather, you pass the file name to Bochs in the .bochsrc (*nix) or bochsrc.txt (Windows) configuration file. You can find the details of the configuration file format with the Bochs documentation.

They can also be passed as command-line arguments, but as a practical matter, using the configuration file is almost always the better approach.

In addition to the disk image, you will need at least a BIOS ROM image and a VGA BIOS ROM image. These should be included in any of the distributions for Bochs, including the usual Windows installer.

There are also a multitude of configuration options for the CPU, memory, etc. most of which have defaults but some of which you might want to alter.

For example, if you have a floppy disk image file called a.img, you could use a bochsrc.txt with the following:

Code: Select all

# disk image file for a 1.44M floppy disk
disk: 1_44="<MY-PATH>/a.img" , status=inserted

# System BIOS image
romimage: file="<MY-ROM-PATH>/BIOS-bochs-latest", address=0xfffe0000

# VGA BIOS - for this example, we can use the 
vgaromimage: file="<MY-ROM-PATH>/VGABIOS-lgpl-latest"

# set the type of VGA support to use - in this case, the default VESA BIOS Extensions
vga: extension=vbe

# set the amount of memory (in megabytes) available to the emulated PC,
# and the amount actually allocated by the host (e.g., real) PC
memory: guest=64, host=128

# details of the emulated CPU
# count is the number of emulated CPUs
# ips is instructions per second; an IPS of 10 million is roughly equal 
# to a 10MHz system (in theory).
cpu: count=1, ips=10000000

where the <MY-PATH> is the directory the image file is in (e.g., "C:\Users\Daniel M\My Documents\OS Experiments\") , and <MY-ROM-PATH> is the directory for the ROM images.

If you need to practice using Bochs with a known good disk image before trying to create one yourself, the Bochs website has several prepared examples, including FreeDOS, OpenBSD, and a number of versions of Linux. These are usually included in the binary installers as well.

This is just a starting point, though. The Bochs Wiki and the OSDev.org Wiki page on Bochs both have more extensive explanations of this, and a search of this forum should reveal a lot of advice on the subject.