Exception handling

[pepito]

I want to include an exception handler into my OS. So far I have included an ISR for each exception interrupt that just display a message, like this:

[MISIS: Error de division entre cero]

But when an error happen the ISR is called again and again infinitely. Then I get some like this:

[MISIS: Error de division entre cero]
[MISIS: Error de division entre cero]
[MISIS: Error de division entre cero]
[MISIS: Error de division entre cero]
[MISIS: Error de division entre cero]
[MISIS: Error de division entre cero]
...

What am I doing wrong?
What an ISR for an error/exception must do?

Any information about "how error/exception handle must be designed" will be appreciated.

Sorry my poor english,

[bregma]

But when an error happen the ISR is called again and again infinitely.

It's possible that the exception is not being called infinitely.

When standard Intel-style systems are first started, interrupts are mapped into the same vectors as exceptions. What you may be seeing is the timer interrupt coming through.

From the looks of it, that's exactly what's happening, since the system timer defaults to IRQ 0 (which is the divide-by-zero exception).

You probably want to look into remapping your interrupts. Google for PIC or APIC.

[[AlAdDiN]]

IMHO : it s normal if ur exception handler looks like this

Code: Select all

void Handle_Exc_01()
{
printk("[MISIS: Error de division entre cero]\n");
}

becose this code return back to ur kernel after printing the message, but the exception is not resolved so it will be raised again and again ....


u must add a while(true); at the end of all unresolved exceptions' handlers

to be able to return back to the kernel without having the same exception to be rised u must correct the problem that caused thi exception first
so u have to read intel manual 3 section ("interrupt and exception handling").

[dembol]

If your task really generated a divide error exception, you should kill this task because #DE is a fault (not a trap). Divide fault saves contents of CS and EIP registers which points to the instruction that generated the exception. I think that your interrupt procedure return to the instruction that generated exception and this instruction is called infinitely.