Receiving only one Keyboard IRQ using IOAPIC
Receiving only one Keyboard IRQ using IOAPIC
Hi.
I'm implementing 8042 keyboard driver and I only manage to get single IRQ when pressing a key, all other key presses / releases won't trigger an interrupt.
I do acknowledge the IRQ to the local APIC by writing 0 to APIC_EOI_REGISTER.
and in the keyboard IRQ handler I read a single byte from the PS2 data port.
I didn't see any explicit EOI I need to write to in the PS2/Keyboard interface.
Did I miss something else ?
PS. The keyboard works correctly in polling mode.
I'm implementing 8042 keyboard driver and I only manage to get single IRQ when pressing a key, all other key presses / releases won't trigger an interrupt.
I do acknowledge the IRQ to the local APIC by writing 0 to APIC_EOI_REGISTER.
and in the keyboard IRQ handler I read a single byte from the PS2 data port.
I didn't see any explicit EOI I need to write to in the PS2/Keyboard interface.
Did I miss something else ?
PS. The keyboard works correctly in polling mode.
“Meaningless! Meaningless!”
says the Teacher.
“Utterly meaningless!
Everything is meaningless.” - Ecclesiastes 1, 2
Educational Purpose Operating System - EPOS
says the Teacher.
“Utterly meaningless!
Everything is meaningless.” - Ecclesiastes 1, 2
Educational Purpose Operating System - EPOS
Re: Receiving only one Keyboard IRQ using IOAPIC
Hi,
Cheers,
Brendan
You get an IRQ when the PS/2 controller's 1-byte buffer goes from "empty" to "full". If you don't remove the byte from the buffer, then the buffer stays full and can't go from "empty" to "full" again.stdcall wrote:I didn't see any explicit EOI I need to write to in the PS2/Keyboard interface.
Did I miss something else ?
Cheers,
Brendan
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Re: Receiving only one Keyboard IRQ using IOAPIC
But I do read a single byte. and I even check if there's more and there isn't.
“Meaningless! Meaningless!”
says the Teacher.
“Utterly meaningless!
Everything is meaningless.” - Ecclesiastes 1, 2
Educational Purpose Operating System - EPOS
says the Teacher.
“Utterly meaningless!
Everything is meaningless.” - Ecclesiastes 1, 2
Educational Purpose Operating System - EPOS
- BrightLight
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Re: Receiving only one Keyboard IRQ using IOAPIC
Try running in Bochs. Does it show any log messages? There are some sources on the Internet saying that the local APIC EOI register is 0xA0. This is wrong; the EOI register is 0xB0.
BTW, did you try the PIT before the keyboard?
BTW, did you try the PIT before the keyboard?
You know your OS is advanced when you stop using the Intel programming guide as a reference.
Re: Receiving only one Keyboard IRQ using IOAPIC
OK. took me some time to configure bochs. but here it is.
do you see something suspicious?
do you see something suspicious?
Code: Select all
00128488000d[KBD ] gen_scancode(): BX_KEY_W pressed
00128488000d[KBD ] keyboard: gen_scancode with scancode_translate cleared
00128488000d[KBD ] gen_scancode(): writing raw 1d
00128488000d[KBD ] kbd_enQ(0x1d)
00128488000d[KBD ] kbd_enQ: putting scancode 0x1d in internal buffer
00128488000d[KBD ] activating timer...
00128488000d[KBD ] service_keyboard: key in internal buffer waiting
00128489000d[IOAPIC] set_irq_level(): INTIN1: level=1
00128489000d[IOAPIC] IOAPIC: servicing
00128489000d[APIC0 ] Deliver lowest priority of fixed interrupt vector 21
00128489000d[APIC0 ] trigger interrupt vector=0x21
00128489000d[APIC0 ] triggered vector 0x21
00128489000d[APIC0 ] lapic(0): not delivering int 0x21 because int 0x21 is in service
00128489000d[IOAPIC] service_ioapic(): INTIN2 is masked
00128489036i[CPU0 ] RDMSR: Read 00000000:fee00800 from MSR_APICBASE
00128489056d[APIC0 ] LAPIC write 0x00000000 to register 0x0b00
00128489056e[APIC0 ] APIC write: register ffffffff not implemented
00128489101d[IOAPIC] set_irq_level(): INTIN1: level=0
00128489101d[KBD ] READ(60) = 1d
00128489696d[IOAPIC] set_irq_level(): INTIN4: level=0
00128489756d[IOAPIC] set_irq_level(): INTIN4: level=0
00128489781d[IOAPIC] set_irq_level(): INTIN4: level=0
00128489821d[IOAPIC] set_irq_level(): INTIN4: level=0
00128489841d[IOAPIC] set_irq_level(): INTIN4: level=0
00128489866d[IOAPIC] set_irq_level(): INTIN4: level=0
00128489891d[IOAPIC] set_irq_level(): INTIN4: level=0
00128489916d[IOAPIC] set_irq_level(): INTIN4: level=0
00128489941d[IOAPIC] set_irq_level(): INTIN4: level=0
00128489961d[IOAPIC] set_irq_level(): INTIN4: level=0
00128489986d[IOAPIC] set_irq_level(): INTIN4: level=0
00128490000d[KBD ] service_keyboard(): no keys waiting
“Meaningless! Meaningless!”
says the Teacher.
“Utterly meaningless!
Everything is meaningless.” - Ecclesiastes 1, 2
Educational Purpose Operating System - EPOS
says the Teacher.
“Utterly meaningless!
Everything is meaningless.” - Ecclesiastes 1, 2
Educational Purpose Operating System - EPOS
Re: Receiving only one Keyboard IRQ using IOAPIC
issue resolved. it was bad LAPIC configuration. I wonder how I even received the first IRQ.
“Meaningless! Meaningless!”
says the Teacher.
“Utterly meaningless!
Everything is meaningless.” - Ecclesiastes 1, 2
Educational Purpose Operating System - EPOS
says the Teacher.
“Utterly meaningless!
Everything is meaningless.” - Ecclesiastes 1, 2
Educational Purpose Operating System - EPOS
Re: Receiving only one Keyboard IRQ using IOAPIC
Can you be more specific on the problem and the solution? Switching from the PIC to APIC is at the top of my list of TO-DOs.
Thanks.
Thanks.
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Re: Receiving only one Keyboard IRQ using IOAPIC
Ditto that. I want to get my LAPIC code finished this week. Got SMP initialization working though!SpyderTL wrote:Can you be more specific on the problem and the solution? Switching from the PIC to APIC is at the top of my list of TO-DOs.
Thanks.
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Re: Receiving only one Keyboard IRQ using IOAPIC
SpyderTL wrote:Can you be more specific on the problem and the solution? Switching from the PIC to APIC
This is enough for my local APIC code to work.crunch wrote:Ditto that. I want to get my LAPIC code finished this week. Got SMP initialization working though!
Code: Select all
; configure the local APIC
mov rax, 0
mov rcx, 0x80
call lapic_write_register
mov rax, 0x1FF
mov rcx, 0xF0
call lapic_write_register ; enable spurious IRQ at INT 0xFF
mov rcx, 0xE0
mov eax, 0xFFFFFFFF
call lapic_write_register
You know your OS is advanced when you stop using the Intel programming guide as a reference.