How do 32 bit addresses in real mode work?

[Kolodez]

Hi, all! I (hopefully, perfectly) understand how 16 bit addresses in real mode work: I have a segment address and an offset (?) address. If I add the segment address shifted by 4 bits and the offset address, I get the physical address. E. g. FFFF:FFFF corresponds to the physical address 10FFEF. (Is this correct, by the way?)

But what happens, if I use the instruction, e. g. mov eax, [eax] (= 66 67 8B 00), in real mode? Is the physical address simply "eax" or "16*ds + eax" or "16*ds + low 16 bit of eax"?

Relying on the sentence

Note that you can still use 32-bit addressing modes in Real Mode, simply by adding the "Address Size Override Prefix" (0x67) to the beginning of any instruction. (...) But you are still constrained by the current "limit" for the segment that you use in each memory access (always 64K in Real Mode -- Unreal Mode can be bigger).

in http://wiki.osdev.org/Real_mode, I get unexpected results.

And, by the way, my RSDP tells me that the physical address (see http://wiki.osdev.org/RSDP) of my XSDT is 7F690100. So, how to access it in real mode?

Thanks for your help!

[mikegonta]

Note that you can still use 32-bit addressing modes in Real Mode, simply by adding the "Address Size Override Prefix" (0x67) to
the beginning of any instruction.

Addressing modes - not 32 bit addresses (which can cause an exception 13 - Segment Overrun if the address is outside the segment
limit). For example in 32 bit addressing you can use esp as a base register in real mode, however only the sp (the upper 16 bits of
esp should be zero) and ss should be used for the 20 bit real mode address).

So, how to access it in real mode?

What are you doing in real mode? That's a rhetorical question. (I know exactly what you are doing there).

[Octocontrabass]

E. g. FFFF:FFFF corresponds to the physical address 10FFEF. (Is this correct, by the way?)

That's correct, as long as you've made sure the A20 line is enabled.

But what happens, if I use the instruction, e. g. mov eax, [eax] (= 66 67 8B 00), in real mode? Is the physical address simply "eax" or "16*ds + eax" or "16*ds + low 16 bit of eax"?

If the high 16 bits of the effective address are 0, then it's "16 * DS + effective address". If the high 16 bits of the effective address are nonzero, you get a general protection fault.

With 16-bit addressing modes, the high 16 bits of the effective address are forced to 0, so if BX = 0xFFFF and SI = 0xFFFF, the operand [BX + SI] is the effective address 0xFFFE, not 0x1FFFE. In 32-bit addressing modes, the high 16 bits of the effective address are not forced to 0, so if EBX = 0xFFFF and ESI = 0xFFFF, the operand [EBX + ESI] is the effective address 0x1FFFE, and you'll get a general protection fault if you're in real mode.

And, by the way, my RSDP tells me that the physical address (see http://wiki.osdev.org/RSDP) of my XSDT is 7F690100. So, how to access it in real mode?

You can't. No valid combination of segment and effective address can reach linear address 0x7F690100 in real mode.

That address is perfectly valid in long mode and 32-bit protected mode. You should switch to one of those before worrying about ACPI. (It's also valid in unreal mode, but you shouldn't be messing with ACPI until your OS is in long/protected mode.)

[freecrac]

Hello.

Only if we change the size of the segment inside a GDT/LDT segment discriptor(+ enable A20) we can access all of the 32 bit address space on 80386+ within the 16 bit PM, or within the 16 bit Big-Real-Mode similar to the himem.sys-driver for MSDOS.

Within the 16-bit PM the high 16 bits of the effective address are not forced to 0 on a 80386+ if we use the larger entries for the segment size inside of the segment discriptor. The only one difference between the 16 bit and the 32 bit address mode is, how the CPU interprete the segmentsize and the operandsize override prefixes, if they are used or not used within the codesegment for each single instruction.

Dirk