Page directories, x86

[Sourcer]

I'm trying to create a basic page direcotry for my kernel, to virtually map it to the higher half of the RAM.

As i understand, a "page directory" maps the whole RAM(4GB), where each directory is a page table mapping for 1024 4K pages.

So i have a few questions:

1. My kernel page directory will be created in compile time(i.e. an array of 1024 uint32_ts), and my kernel starts at 0xC0100000. which of the page tables in my page directory need to be mapped?
i didn't quite understand the way the MMU "indexes" a page.

2. I'm kinda stuck in an endless loop. i have a page directory array, i'm trying to compile the module that contains that array with 'position-independent' mode, so i won't address anything
because the relocation are actually virtual. but how am i suppose to map the page directory to CR3, if in fact its address is virtual?(0xC0100000+ ..)

2. In theory, when i'll implement multitasking and processes, each process shall have its own page directory, and a mapping of the kernel in its page dir, am i right?

3.Why does the page directory must be aligned to page size?(i mean, start in an address that is divideable in 4096)

[BrightLight]

1. My kernel page directory will be created in compile time(i.e. an array of 1024 uint32_ts), and my kernel starts at 0xC0100000. which of the page tables in my page directory need to be mapped?

You don't need to do it in compile time; it is really a waste of space. Reserve space for it in your BSS section and create the page directory as well as the page tables in a loop.
Specifically for 0xC0100000, you'll need page directory number 768. Read about Page Frames.

i didn't quite understand the way the MMU "indexes" a page.

In 32-bit paging, CR3 points at the page directory. The page directory contains 1024 pointers to 1024 page tables. Each page table can map 1024 pages, each 4 KB. Each entry of the page table maps a physical address.

2. In theory, when i'll implement multitasking and processes, each process shall have its own page directory, and a mapping of the kernel in its page dir, am i right?

That probably depends on your design, really.

3.Why does the page directory must be aligned to page size?(i mean, start in an address that is divideable in 4096)

To have bits 0-11 always free for the CPU's use. The CPU uses these bits that are not part of the aligned address as "page flags." These include whether a page is present, whether is page has write permission, and whether a page can be accessed from userspace.

This article explains everything.

[Sourcer]

1. My kernel page directory will be created in compile time(i.e. an array of 1024 uint32_ts), and my kernel starts at 0xC0100000. which of the page tables in my page directory need to be mapped?

You don't need to do it in compile time; it is really a waste of space. Reserve space for it in your BSS section and create the page directory as well as the page tables in a loop.
Specifically for 0xC0100000, you'll need page directory number 768. Read about Page Frames.

i didn't quite understand the way the MMU "indexes" a page.

In 32-bit paging, CR3 points at the page directory. The page directory contains 1024 pointers to 1024 page tables. Each page table can map 1024 pages, each 4 KB. Each entry of the page table maps a physical address.

2. In theory, when i'll implement multitasking and processes, each process shall have its own page directory, and a mapping of the kernel in its page dir, am i right?

That probably depends on your design, really.

3.Why does the page directory must be aligned to page size?(i mean, start in an address that is divideable in 4096)

To have bits 0-11 always free for the CPU's use. The CPU uses these bits that are not part of the aligned address as "page flags." These include whether a page is present, whether is page has write permission, and whether a page can be accessed from userspace.

This article explains everything.

Cool. thank you!
I added another question, i'll appreciate if you answer it too.
Also "reserving space in bss" means doing something like this in my linker script:

Code: Select all

kernel_start = .
......

.bss : ALIGN(4k) { *(.bss) }
kernel_page_directory = .
. += 1024 * 4

.....

kernel_end = .

am i right?

[BrightLight]

I meant just using uninitialized memory and then you initialize it using a loop. This way you can create a page directory/table without actually increasing the size of your kernel by 4+ KB.