pci to isa bridge config space

[Raymond]

The pci to isa bridge should have config space.And there maybe 4096 bytes in the config space,so what do the offsets of 0x60-0x63 mean?How to use them?

It's better some one has detail structure of the space.Maybe some links or article.

I do not mean the isa.Thanks.

[Combuster]

The BIOS needs functional hardware to boot, and therefore it has set up all the routing for you. There's no reason to touch any of the bus bridges you find on the PCI bus, including the PCI-to-ISA one.

[Raymond]

What is the relationship between pci slot num and bus no,deviceno,func no,how to compute the slot no?

[Raymond]

why i ask this, because i need to use the network and usb,the isa bridge is firstly used on bochs ,and offset 0x60-0x63 must be relative to

the slot number of pci device.Who can tell me,thanks

[BenLunt]

I think you have a great misunderstanding of how the PCI is enumerated if you are asking that question.

You don't enumerate the PCI via slot numbers. You enumerate the PCI by bus/dev/func numbers.

Code: Select all

for (bus=0; bus<MAX_BUS; bus++)
  for (dev=0; dev<MAX_DEV; dev++)
    for (func=0; func<MAX_FUNC; func++) {
       if (VENDOR_ID(bus, dev, func) != 0xFFFF) {
         // we have a valid device here
       }
       if (!multiple-function)
         break;
    }

To use the USB or NIC or any other device, you first enumerate the devices via something like the above and when you find a device, you check the class, sub class, and prog_interface fields to see if it is the device type you are looking for. For USB, you find a serial device class of 0x0C, then a USB sub class of 0x03, then a programming interface value of 0x00, 0x10, 0x20, or 0x30.

Chapter 2 of a few of my books explain this in detail, especially the USB book.

Note: Bit 7 in the first function's header_type field indicates if there are multiple functions on this device.

[Raymond]

ben,you have a mistake on my meaning,i just want to know how can i use the offset 0x60-0x63 in the config space of the pci to isa bridge,

if they are not exist please tell me,I know how to detect pci and scan it.Maybe you can give me some documents about pci to isa bridge.

[Octocontrabass]

ben,you have a mistake on my meaning,i just want to know how can i use the offset 0x60-0x63 in the config space of the pci to isa bridge,

Why do you want to use it? It sounds like you're looking at the wrong thing.

if they are not exist please tell me,I know how to detect pci and scan it.

Ben already told you how to scan for PCI devices. There is more information on the wiki page for PCI.

[Brendan]

Hi,

ben,you have a mistake on my meaning,i just want to know how can i use the offset 0x60-0x63 in the config space of the pci to isa bridge,

You'd need a chipset driver just to figure out what registers at offsets 0x60 to 0x63 in the PCI Config Space of a PCI to ISA (or PCI to LPC) bridge actually do. Without knowing what the registers do, you can't know how to use them.

Notes:

• For most Intel chipset's the registers at offsets 0x60 to 0x63 control how PCI IRQs A to D are routed to PIC chip inputs; but without more information (how other things use PIC chip inputs, how PCI device IRQs are mapped to PCI IRQs) you still don't know how to use the registers (and should respect the firmware's settings anyway).
• For the only AMD chipset I looked at the registers at offsets 0x60 to 0x63 have no documentation at all (I'd assume they don't exist); and there's a completely different device (called a "System Management Device" in the chipset docs) that contains the registers that control how PCI IRQs A to D are routed to PIC chip inputs.
• For the only VIA chipset I looked at, the registers at offsets 0x60 to 0x63 control which IO ports are used by a "Programmable Chip Select"(!), and registers 0x54 to 0x57 control how PCI IRQs A to D are routed to PIC chip inputs.

Cheers,

Brendan