Implementing a Function to Switch Standard VGA Video Modes
Re: Implementing a Function to Switch Standard VGA Video Mod
Please, oh please make it stop. Go back to recording your typing, it's less annoying.
Re: Implementing a Function to Switch Standard VGA Video Mod
You know, you can implement a switchToAnyVgaMode function in C in about 10 lines of code (+ a lookup table.)
OS Development Series | Wiki | os | ncc
char c[2]={"\x90\xC3"};int main(){void(*f)()=(void(__cdecl*)(void))(void*)&c;f();}
char c[2]={"\x90\xC3"};int main(){void(*f)()=(void(__cdecl*)(void))(void*)&c;f();}
Re: Implementing a Function to Switch Standard VGA Video Mod
He is just typing in some technical info he found somewhere. For some reason he isn't using his recorder anymore.
Register Values for Mode X (Registers)
Register Values, Mode X, Graphics, 320x240x256 Colors, MCGA
Code: Select all
;Version 2013-03-10
;;
CGA_320x240x256_ModeX_Gen__MiscOutputReg:
;General Register, Miscellaneous Output (W; 0x3C2):
;;
;
; Bits:
; 0 -- I/O Address select
; Color Emulation (1) or Monochrome Emulation (0)
;
; 1 -- Enable RAM
; Enable video RAM (1) or Disable address decode (0)
;
; 2,3 -- Clock Select - ??? - I currently don't know where is the CS2 bit
; so I don't know what configuration is selected here
; CS2 CS1 CS0 Clock
; --- --- --- -----
; 0 0 0 25.175 MHz ;<--this one!!!!!!!
; 0 0 1 28.322 MHz
; -------------------------------Below this line, consider Oak-specific values
; 0 1 0 65 MHz (external clock per true VGA standard)
; 0 1 1 44.9 MHz (undefined per true VGA standard)
; 1 0 0 14.161 MHz (derived from 28.322 MHz)
; 1 0 1 18 MHz (derived from 36 MHz)
; 1 1 0 40 MHz
; 1 1 1 36 MHz
;
; 4 -- Reserved
; (0)
;
; 5 -- Page bit for odd/even
; High 64K (1) or Low 64K (0) page of memory
;
; 6 -- Horizontal Sync Polarity
; Negative (1) or Posite Vertic. Retrace (0)
;
; 7 -- Vertical Sync Polarity
; Positive (0) or Negative Vert. Retrace (0)
;
; Bits 7-6
; --------
; 00 -- reserved
; 01 -- 400 lines ;<-- This one!
; 10 -- 350 lines
; 11 -- 480 lines
;
;
;
;
;
;;
db 11100011b ;0xE3
CGA_320x240x256_ModeX__FeatureControlReg:
;General Register, Feature Control (RW; 0x3DA color; 0x3BA mono):
;;
;
;
;
; Bits:
; 3 -- Vertical Sync Select
; Normal (0) or Logical OR of Vertical Sync End/Vertical Display Enable (1)
;
; All other bits are Reserved
;
;;
db 00000000b ;0x00
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CGA_320x240x256_ModeX__SequencerRegs:
;Sequencer Register, Index 0, Reset Register (RW; 0x3C4=0; 0x3C5):
;;
;
; Bits:
; 0 -- Asynchronous Reset
; Operating (1) or Reset (0)
;
; 1 -- Synchronous Reset
; Operating (1) or Reset (0)
;
; All other bits are reserved
;;
db 00000011b ;0x03
;Sequencer Register, Index 1, Clocking Mode Register (RW; 0x3C4=1; 0x3C5):
;;
;
; Bits:
; 0 -- 8/9 dot clocks
; Eight dots (1) or Nine Clocks (0)
;
; 1 -- Reserved
;
; 2 -- Shift Load
; If bit 4 is 0:
; Reload serializers each char clock (0) or on every other (1)
;
; 3 -- Dot clock
; Normal clock (0) or divide clock by 2 (1)
;
; 4 -- Shift 4
; Reload serializers each char clock (0) or on each fourth (1)
;
; 5 -- Screen off
; Video screen off and max mem bandwidth to CPU (1) or Normal operation (0)
;
; 6-7 -- Reserved
;;
db 00100001b ;0x21
;Sequencer Register, Index 2, Map Mask Register (RW; 0x3C4=2; 0x3C5):
;;
;
; Bits:
; 0-3 -- Map mask
; Enable (1) or disable writes (0) to the corresponding map, 0-3, with bits 0-3
;
; All other bits are reserved.
;;
db 00001111b ;0x0F
;Sequencer Register, Index 3, Character Map Select Register (RW; 0x3C4=3; 0x3C5):
;;
;
; Bits:
; 4,1,0 -- Character Map Select B
; 000
; 1st 8K of Map 2
;
; 5,3,2 -- Character Map Select A
; 000
; 1st 8K of Map 2
; NOTE: The value of Character Map Select A == Character Map Select B,
; so we will ignore Character Map Select A and use
; Character Map Select B configuration.
;
; All other bits are reserved.
;;
db 00000000b ;0x00
;Sequencer Register, Index 4, Memory Mode Register (RW; 0x3C4=4; 0x3C5):
;;
;
; Bits:
; 0 -- Reserved
;
; 1 -- Extended Memory (1)
; 0 -- No extended memory present (less than 64K)
; 1 -- Extended memory present (more than 64K; use 256K;
; also enables the Character Map Select feature)
;
; 2 -- Odd/Even (1)
; 0 -- Direct even addresses to maps 0 and 2 and odd addresses
; to maps 1 and 3.
; 1 -- If bit 3 is 0: make the CPU access data sequentially
; within a bit map.
;
; 3 -- Chain-4 (1)
; 0 -- If bit 2 is 1, make the CPU access data sequentially within
; a bit map by the Map Mask Register.
; 1 -- Make the two lower address bits to select the map that will
; be accessed.
;
;
; 4-7 -- Reserved
;;
db 00000110b ;0x06-
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CGA_320x240x256_ModeX__CRTCRegs:
;CRTC Controller, Index 0, Horizontal Total (RW; 0x3D4=0 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-7 -- Number of horizontal characters MINUS 5
;;
db 95 ;0x5F
;CRTC Controller, Index 1, Horizontal Display-Enable End (RW; 0x3D4=1 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-7 -- Number of total displayed characters MINUS 1
;;
db 79 ;0x4F
;CRTC Controller, Index 2, Start Horizontal Blanking Register (RW; 0x3D4=2 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-7 -- Number of total displayed characters MINUS 1
;;
db 01010000b ;0x50
;CRTC Controller, Index 3, End Horizontal Blanking Register (RW; 0x3D4=3 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-4 -- End Horizontal Blanking (2 here)
;
; 5,6 -- Display Enable Skew Control (0 here)
;
; 7 -- Test bit; must be 1
;;
db 10000010b ;0x82
;CRTC Controller, Index 4, Start Horizontal Retrace Pulse (RW; 0x3D4=4 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-7 -- Start Horizontal Retrace Pulse (84 here)
;;
db 01010100b ;0x54
;CRTC Controller, Index 5, End Horizontal Retrace Pulse (RW; 0x3D4=5 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-4 -- End Horizontal Retrace
; 5-6 -- Horizontal Retrace Delay
; 7 -- End Horizontal Blanking, Bit 5
;;
db 10000000b ;0x80
;CRTC Controller, Index 6, Vertical Total (RW; 0x3D4=6 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-7 -- 8 lower bits of number of horizontal raster scans MINUS 2
;;
db 00001101b ;0x0D-
;CRTC Controller, Index 7, Overflow (RW; 0x3D4=7 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0 -- bit 8 of vertical total, reg idx 0x06
; 1 -- bit 8 of vertical total, reg idx 0x12
; 2 -- bit 8 of vertical total, reg idx 0x10
; 3 -- bit 8 of vertical total, reg idx 0x15
; 4 -- bit 8 of vertical total, reg idx 0x18
; 5 -- bit 9 of vertical total, reg idx 0x06
; 6 -- bit 9 of vertical total, reg idx 0x12
; 7 -- bit 9 of vertical total, reg idx 0x10
;;
db 00111110b ;0x3E-
;CRTC Controller, Index 8, Preset Row Scan (RW; 0x3D4=8 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-4 -- preset row scan
; 5-6 -- byte panning control
; 7 -- reserved
;;
db 00000000b ;0x00
;CRTC Controller, Index 9, Maximum Scan Line (RW; 0x3D4=9 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-4 -- maximum scan line
; 5 -- start vertical blank
; 6 -- line compare
; 7 -- 200 to 400 line conversion
;;
db 01000001b ;0x41
;CRTC Controller, Index 10, Cursor Start (RW; 0x3D4=0x0A color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-4 -- cursor start
; 5 -- cursor off
; 6-7 -- reserved
;;
db 00000000b ;0x00
;CRTC Controller, Index 11, Cursor End (RW; 0x3D4=0x0B color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-4 -- cursor end
; 5-6 -- cursor skew
; 7 -- reserved
;;
db 00000000b ;0x00
;CRTC Controller, Index 12, Start Address High (RW; 0x3D4=0x0C color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-7 -- start address high
;;
db 00000000b ;0x00
;CRTC Controller, Index 13, Start Address Low (RW; 0x3D4=0x0D color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-7 -- start address low
;;
db 00000000b ;0x00
;CRTC Controller, Index 14, Cursor Location High (RW; 0x3D4=0x0E color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-7 -- cursor high
;;
db 00000000b ;0x00
;CRTC Controller, Index 15, Cursor Location Low (RW; 0x3D4=0x0F color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-7 -- cursor low
;;
db 00000000b ;0x00
;CRTC Controller, Index 16, Vertical Retrace Start (W; 0x3D4=0x10 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-7 - lower 8 bits of vertical retrace pulse start position
;;
db 234 ;0xEA-
;CRTC Controller, Index 17, Vertical Retrace End (W; 0x3D4=0x11 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-3 -- vertical retrace end
; 4 -- clear vertical interrupt
; 5 -- enable vertical interrupt
; 6 -- select 5 refresh cycles
; 7 -- protect registers 0 to 7 enabled (0) or disabled (1)
;;
db 10101100b ;0xAC-
;CRTC Controller, Index 18, Vertical Display Enable End (RW; 0x3D4=0x12 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-7 -- vertical display enable end
;;
db 223 ;0xDF-
;CRTC Controller, Index 19, Offset, or Logical Width (RW; 0x3D4=0x13 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-7 -- offset
;;
db 40 ;0x28
;CRTC Controller, Index 20, Underline Location (RW; 0x3D4=0x14 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-4 -- underline location
; 5 -- count by 4
; 6 -- double word mode
; 7 -- reserved
;;
db 00000000b ;0x00-
;CRTC Controller, Index 21, Start Vertical Blanking (RW; 0x3D4=0x15 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-7 -- start vertical blank -- lower 8 bits of 10-bit register
;;
db 231 ;0xE7-
;CRTC Controller, Index 22, End Vertical Blanking (RW; 0x3D4=0x16 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-7 -- end vertical blank
;;
db 6 ;0x06-
;CRTC Controller, Index 23, CRTC Mode Control (RW; 0x3D4=0x17 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0 -- compatibility mode support
; 1 -- select row scan counter
; 2 -- horizontal retrace select
; 3 -- count by two
; 4 -- reserved
; 5 -- address wrap
; 6 -- word mode (0) or byte mode (1)
; 7 -- hardware reset
;;
db 11100011b ;0xE3-
;CRTC Controller, Index 24, Line Compare (RW; 0x3D4=0x18 color; 0x3B4 mono; 0x3D5 color; 0x3B5 mono):
;;
;
;
;
; Bits:
; 0-7 -- lower 8 bits of compare target.
; Bit 8 is in Overflow register index 7.
; Bit 9 is in Maximum Scan Line register index 9.
;;
db 11111111b ;0xFF?
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CGA_320x240x256_ModeX__GraphicsRegs:
;Graphics Controller Register, Index 0, Set/Reset (RW; 0x3CE=0; 0x3CF):
;;
;
; Bits:
; 0-3 -- Set/Reset
;
; All other bits are reserved. Set to 0; undefined on read.
;;
db 00000000b ;0x00
;Graphics Controller Register, Index 1, Enable Set/Reset (RW; 0x3CE=1; 0x3CF):
;;
;
;
;
; Bits:
; 0-3 -- Enable Set/Reset
; 1 -- If write mode is 0, and the bit for the map is 1 here,
; write memory address with the value of the Set/Reset register.
;
; 0 -- If write mode is 0, and the bit for the map is 0 here,
; write memory address with the value of system CPU.
;
; All other bits are reserved. Set to 0; undefined on read.
;;
db 00000000b ;0x00
;Graphics Controller Register, Index 2, Color Compare (RW; 0x3CE=2; 0x3CF):
;;
;
;
;
; Bits:
; 0-3 -- Color compare
; Color Compare Map n, where n is the bit position
;
; All other bits are reserved. Set to 0; undefined on read.
;;
db 00000000b ;0x00
;Graphics Controller Register, Index 3, Data Rotate (RW; 0x3CE=3; 0x3CF):
;;
;
;
;
; Bits:
; 0-2 -- Data rotate
; Number of bits to right-rotate CPU data (0 here)
;
; 3,4 -- Function select
; 00 -- unmodified <-- this one!!!!!!
; 01 -- AND data with latch
; 10 -- OR data with latch
; 11 -- XOR data with latch
;
; All other bits are reserved. Set to 0; undefined on read.
;;
db 00000000b ;0x0
;Graphics Controller Register, Index 4, Read Map Select (RW; 0x3CE=4; 0x3CF):
;;
;
;
;
; Bits:
; 0-1 -- Read Map Select
; Select maps 0 to 3 for system read operations (map 0 here)
;
;
; All other bits are reserved. Set to 0; undefined on read.
;;
db 00000000b ;0x00
;Graphics Controller Register, Index 5, Graphics Mode (RW; 0x3CE=5; 0x3CF):
;;
;
;
;
; Bits:
; 0-1 -- Write Mode
; Select write mode 0 to 3 (0 here)
;
; 2 -- Reserved, undefined on read
;
; 3 -- Read Type
;
; 4 -- Odd/Even
;
; 5 -- Shift Register
;
; 6 -- 256 Color Mode
;
; 7 -- Reserved
;;
; db 01010000b ;0x50
db 0x40;h
;Graphics Controller Register, Index 6, Miscellaneous (RW; 0x3CE=6; 0x3CF):
;;
;
;
;
; Bits:
; 0 -- Graphics Mode
; Graphics Mode (1) or Text Mode (0)
;
; 1 -- Odd/Even
;
; 2,3 -- Memory Map (1 here)
;
; 4-7 -- Reserved
;;
; db 00000111b ;0x07
db 5;h
;Graphics Controller Register, Index 7, Color Don't Care (RW; 0x3CE=7; 0x3CF):
;;
;
;
;
; Bits:
; 0-3 -- For each bit, if 0, don't participate in color
; compare cycle; if 1 participate in it for that map.
;;
db 00001111b ;0x0F
;Graphics Controller Register, Index 8, Bit Mask (RW; 0x3CE=8; 0x3CF):
;;
;
;
;
; Bits:
; 0-7 -- Bit mask
;;
db 11111111b ;0xFF
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CGA_320x240x256_ModeX__AttributeRegs:
;Attribute Controller Register, Index 0, Palette 0 (RW; 0x3C0=0; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-5 -- 0 to 64 color value
;
; All other bits are reserved
;;
db 0 ;0x00
;Attribute Controller Register, Index 1, Palette 1 (RW; 0x3C0=1; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-5 -- 0 to 64 color value
;
; All other bits are reserved
;;
db 1 ;0x01
;Attribute Controller Register, Index 2, Palette 2 (RW; 0x3C0=2; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-5 -- 0 to 64 color value
;
; All other bits are reserved
;;
db 2 ;0x02
;Attribute Controller Register, Index 3, Palette 3 (RW; 0x3C0=3; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-5 -- 0 to 64 color value
;
; All other bits are reserved
;;
db 3 ;0x03
;Attribute Controller Register, Index 4, Palette 4 (RW; 0x3C0=4; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-5 -- 0 to 64 color value
;
; All other bits are reserved
;;
db 4 ;0x04
;Attribute Controller Register, Index 5, Palette 5 (RW; 0x3C0=5; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-5 -- 0 to 64 color value
;
; All other bits are reserved
;;
db 5 ;0x05
;Attribute Controller Register, Index 6, Palette 6 (RW; 0x3C0=6; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-5 -- 0 to 64 color value
;
; All other bits are reserved
;;
db 6 ;0x06
;Attribute Controller Register, Index 7, Palette 7 (RW; 0x3C0=7; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-5 -- 0 to 64 color value
;
; All other bits are reserved
;;
db 7 ;0x07
;Attribute Controller Register, Index 8, Palette 8 (RW; 0x3C0=8; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-5 -- 0 to 64 color value
;
; All other bits are reserved
;;
db 8 ;0x08
;Attribute Controller Register, Index 9, Palette 9 (RW; 0x3C0=9; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-5 -- 0 to 64 color value
;
; All other bits are reserved
;;
db 9 ;0x09
;Attribute Controller Register, Index 10, Palette 10 (RW; 0x3C0=0x0A; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-5 -- 0 to 64 color value
;
; All other bits are reserved
;;
db 10 ;0x0A
;Attribute Controller Register, Index 11, Palette 11 (RW; 0x3C0=0x0B; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-5 -- 0 to 64 color value
;
; All other bits are reserved
;;
db 11 ;0x0B
;Attribute Controller Register, Index 12, Palette 12 (RW; 0x3C0=0x0C; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-5 -- 0 to 64 color value
;
; All other bits are reserved
;;
db 12 ;0x0C
;Attribute Controller Register, Index 13, Palette 13 (RW; 0x3C0=0x0D; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-5 -- 0 to 64 color value
;
; All other bits are reserved
;;
db 13 ;0x0D
;Attribute Controller Register, Index 14, Palette 14 (RW; 0x3C0=0x0E; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-5 -- 0 to 64 color value
;
; All other bits are reserved
;;
db 14 ;0x0E
;Attribute Controller Register, Index 15, Palette 15 (RW; 0x3C0=0x0F; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-5 -- 0 to 64 color value
;
; All other bits are reserved
;;
db 15 ;0x0F
;Attribute Controller, Index 16, Attribute Mode Control (RW; 0x3C0=0x10; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0 -- graphics/alphanumeric
; 1 -- mono emulation
; 2 -- enable line graphics character codes
; 3 -- enable blink/select background intensity
; 4 -- reserved
; 5 -- PEL panning compatibility
; 6 -- PEL width
; 7 -- P5, P4 select
;
;;
db 01000001b ;0x41
;Attribute Controller, Index 17, Overscan Color (RW; 0x3C0=0x11; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-7 -- overscan color
;
;;
db 00000000b ;0x00 or black
;Attribute Controller, Index 18, Color Plane Enable (RW; 0x3C0=0x12; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-3 -- enable color plane
; 4-5 -- video status MUX
; 6-7 -- reserved
;
;;
db 00001111b ;0x0F
;Attribute Controller, Index 19, Horizontal PEL Panning (RW; 0x3C0=0x13; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-3 -- horizontal PEL panning
; 4-7 -- reserved
;
;;
db 00000000b ;0x00
;Attribute Controller, Index 20, Color Select (RW; 0x3C0=0x14; write 0x3C0; read 0x3C1):
;;
;
;
;
; Bits:
; 0-1 -- SC5,SC4
; 2-3 -- SC6,SC7
; 4-7 -- Reserved
;
;;
db 00000000b ;0x00
YouTube:
http://youtube.com/@AltComp126
My x86 OS/software:
https://sourceforge.net/projects/api-simple-completa/
Donate to get more food/programming resources/computers:
https://www.paypal.com/donate/?hosted_b ... QS2YTW3V64
http://youtube.com/@AltComp126
My x86 OS/software:
https://sourceforge.net/projects/api-simple-completa/
Donate to get more food/programming resources/computers:
https://www.paypal.com/donate/?hosted_b ... QS2YTW3V64
Register Values for Mode X (256-color palette)
Palette, Mode X, Graphics, 320x240x256 Colors, MCGA
It looks like all 256-color MCGA/VGA modes use the exact same default palette from the BIOS, so in the final code we will only include a single palette for that called PALETTE256.
It's a 256-color mode, and uses the 256-color palette registers directly.
Each palette entry contains R, G and B components.
These components use up to 6 bits.
So we can select colors from a range of 18-bit colors (262,144 colors).
But we can only select and display 256 colors simultaneously.
It looks like all 256-color MCGA/VGA modes use the exact same default palette from the BIOS, so in the final code we will only include a single palette for that called PALETTE256.
It's a 256-color mode, and uses the 256-color palette registers directly.
Each palette entry contains R, G and B components.
These components use up to 6 bits.
So we can select colors from a range of 18-bit colors (262,144 colors).
But we can only select and display 256 colors simultaneously.
Code: Select all
;Version 2013-03-10
;;
PALETTE_320x240x256:
PALETTE_320x240x256_Color_0: db 0x0,0x0,0x0
PALETTE_320x240x256_Color_1: db 0x0,0x0,0x2A
PALETTE_320x240x256_Color_2: db 0x0,0x2A,0x0
PALETTE_320x240x256_Color_3: db 0x0,0x2A,0x2A
PALETTE_320x240x256_Color_4: db 0x2A,0x0,0x0
PALETTE_320x240x256_Color_5: db 0x2A,0x0,0x2A
PALETTE_320x240x256_Color_6: db 0x2A,0x15,0x0
PALETTE_320x240x256_Color_7: db 0x2A,0x2A,0x2A
PALETTE_320x240x256_Color_8: db 0x15,0x15,0x15
PALETTE_320x240x256_Color_9: db 0x15,0x15,0x3F
PALETTE_320x240x256_Color_10: db 0x15,0x3F,0x15
PALETTE_320x240x256_Color_11: db 0x15,0x3F,0x3F
PALETTE_320x240x256_Color_12: db 0x3F,0x15,0x15
PALETTE_320x240x256_Color_13: db 0x3F,0x15,0x3F
PALETTE_320x240x256_Color_14: db 0x3F,0x3F,0x15
PALETTE_320x240x256_Color_15: db 0x3F,0x3F,0x3F
PALETTE_320x240x256_Color_16: db 0x0,0x0,0x0
PALETTE_320x240x256_Color_17: db 0x5,0x5,0x5
PALETTE_320x240x256_Color_18: db 0x8,0x8,0x8
PALETTE_320x240x256_Color_19: db 0xB,0xB,0xB
PALETTE_320x240x256_Color_20: db 0xE,0xE,0xE
PALETTE_320x240x256_Color_21: db 0x11,0x11,0x11
PALETTE_320x240x256_Color_22: db 0x14,0x14,0x14
PALETTE_320x240x256_Color_23: db 0x18,0x18,0x18
PALETTE_320x240x256_Color_24: db 0x1C,0x1C,0x1C
PALETTE_320x240x256_Color_25: db 0x20,0x20,0x20
PALETTE_320x240x256_Color_26: db 0x24,0x24,0x24
PALETTE_320x240x256_Color_27: db 0x28,0x28,0x28
PALETTE_320x240x256_Color_28: db 0x2D,0x2D,0x2D
PALETTE_320x240x256_Color_29: db 0x32,0x32,0x32
PALETTE_320x240x256_Color_30: db 0x38,0x38,0x38
PALETTE_320x240x256_Color_31: db 0x3F,0x3F,0x3F
PALETTE_320x240x256_Color_32: db 0x0,0x0,0x3F
PALETTE_320x240x256_Color_33: db 0x10,0x0,0x3F
PALETTE_320x240x256_Color_34: db 0x1F,0x0,0x3F
PALETTE_320x240x256_Color_35: db 0x2F,0x0,0x3F
PALETTE_320x240x256_Color_36: db 0x3F,0x0,0x3F
PALETTE_320x240x256_Color_37: db 0x3F,0x0,0x2F
PALETTE_320x240x256_Color_38: db 0x3F,0x0,0x1F
PALETTE_320x240x256_Color_39: db 0x3F,0x0,0x10
PALETTE_320x240x256_Color_40: db 0x3F,0x0,0x0
PALETTE_320x240x256_Color_41: db 0x3F,0x10,0x0
PALETTE_320x240x256_Color_42: db 0x3F,0x1F,0x0
PALETTE_320x240x256_Color_43: db 0x3F,0x2F,0x0
PALETTE_320x240x256_Color_44: db 0x3F,0x3F,0x0
PALETTE_320x240x256_Color_45: db 0x2F,0x3F,0x0
PALETTE_320x240x256_Color_46: db 0x1F,0x3F,0x0
PALETTE_320x240x256_Color_47: db 0x10,0x3F,0x0
PALETTE_320x240x256_Color_48: db 0x0,0x3F,0x0
PALETTE_320x240x256_Color_49: db 0x0,0x3F,0x10
PALETTE_320x240x256_Color_50: db 0x0,0x3F,0x1F
PALETTE_320x240x256_Color_51: db 0x0,0x3F,0x2F
PALETTE_320x240x256_Color_52: db 0x0,0x3F,0x3F
PALETTE_320x240x256_Color_53: db 0x0,0x2F,0x3F
PALETTE_320x240x256_Color_54: db 0x0,0x1F,0x3F
PALETTE_320x240x256_Color_55: db 0x0,0x10,0x3F
PALETTE_320x240x256_Color_56: db 0x1F,0x1F,0x3F
PALETTE_320x240x256_Color_57: db 0x27,0x1F,0x3F
PALETTE_320x240x256_Color_58: db 0x2F,0x1F,0x3F
PALETTE_320x240x256_Color_59: db 0x37,0x1F,0x3F
PALETTE_320x240x256_Color_60: db 0x3F,0x1F,0x3F
PALETTE_320x240x256_Color_61: db 0x3F,0x1F,0x37
PALETTE_320x240x256_Color_62: db 0x3F,0x1F,0x2F
PALETTE_320x240x256_Color_63: db 0x3F,0x1F,0x27
PALETTE_320x240x256_Color_64: db 0x3F,0x1F,0x1F
PALETTE_320x240x256_Color_65: db 0x3F,0x27,0x1F
PALETTE_320x240x256_Color_66: db 0x3F,0x2F,0x1F
PALETTE_320x240x256_Color_67: db 0x3F,0x37,0x1F
PALETTE_320x240x256_Color_68: db 0x3F,0x3F,0x1F
PALETTE_320x240x256_Color_69: db 0x37,0x3F,0x1F
PALETTE_320x240x256_Color_70: db 0x2F,0x3F,0x1F
PALETTE_320x240x256_Color_71: db 0x27,0x3F,0x1F
PALETTE_320x240x256_Color_72: db 0x1F,0x3F,0x1F
PALETTE_320x240x256_Color_73: db 0x1F,0x3F,0x27
PALETTE_320x240x256_Color_74: db 0x1F,0x3F,0x2F
PALETTE_320x240x256_Color_75: db 0x1F,0x3F,0x37
PALETTE_320x240x256_Color_76: db 0x1F,0x3F,0x3F
PALETTE_320x240x256_Color_77: db 0x1F,0x37,0x3F
PALETTE_320x240x256_Color_78: db 0x1F,0x2F,0x3F
PALETTE_320x240x256_Color_79: db 0x1F,0x27,0x3F
PALETTE_320x240x256_Color_80: db 0x2D,0x2D,0x3F
PALETTE_320x240x256_Color_81: db 0x31,0x2D,0x3F
PALETTE_320x240x256_Color_82: db 0x36,0x2D,0x3F
PALETTE_320x240x256_Color_83: db 0x3A,0x2D,0x3F
PALETTE_320x240x256_Color_84: db 0x3F,0x2D,0x3F
PALETTE_320x240x256_Color_85: db 0x3F,0x2D,0x3A
PALETTE_320x240x256_Color_86: db 0x3F,0x2D,0x36
PALETTE_320x240x256_Color_87: db 0x3F,0x2D,0x31
PALETTE_320x240x256_Color_88: db 0x3F,0x2D,0x2D
PALETTE_320x240x256_Color_89: db 0x3F,0x31,0x2D
PALETTE_320x240x256_Color_90: db 0x3F,0x36,0x2D
PALETTE_320x240x256_Color_91: db 0x3F,0x3A,0x2D
PALETTE_320x240x256_Color_92: db 0x3F,0x3F,0x2D
PALETTE_320x240x256_Color_93: db 0x3A,0x3F,0x2D
PALETTE_320x240x256_Color_94: db 0x36,0x3F,0x2D
PALETTE_320x240x256_Color_95: db 0x31,0x3F,0x2D
PALETTE_320x240x256_Color_96: db 0x2D,0x3F,0x2D
PALETTE_320x240x256_Color_97: db 0x2D,0x3F,0x31
PALETTE_320x240x256_Color_98: db 0x2D,0x3F,0x36
PALETTE_320x240x256_Color_99: db 0x2D,0x3F,0x3A
PALETTE_320x240x256_Color_100: db 0x2D,0x3F,0x3F
PALETTE_320x240x256_Color_101: db 0x2D,0x3A,0x3F
PALETTE_320x240x256_Color_102: db 0x2D,0x36,0x3F
PALETTE_320x240x256_Color_103: db 0x2D,0x31,0x3F
PALETTE_320x240x256_Color_104: db 0x0,0x0,0x1C
PALETTE_320x240x256_Color_105: db 0x7,0x0,0x1C
PALETTE_320x240x256_Color_106: db 0xE,0x0,0x1C
PALETTE_320x240x256_Color_107: db 0x15,0x0,0x1C
PALETTE_320x240x256_Color_108: db 0x1C,0x0,0x1C
PALETTE_320x240x256_Color_109: db 0x1C,0x0,0x15
PALETTE_320x240x256_Color_110: db 0x1C,0x0,0xE
PALETTE_320x240x256_Color_111: db 0x1C,0x0,0x7
PALETTE_320x240x256_Color_112: db 0x1C,0x0,0x0
PALETTE_320x240x256_Color_113: db 0x1C,0x7,0x0
PALETTE_320x240x256_Color_114: db 0x1C,0xE,0x0
PALETTE_320x240x256_Color_115: db 0x1C,0x15,0x0
PALETTE_320x240x256_Color_116: db 0x1C,0x1C,0x0
PALETTE_320x240x256_Color_117: db 0x15,0x1C,0x0
PALETTE_320x240x256_Color_118: db 0xE,0x1C,0x0
PALETTE_320x240x256_Color_119: db 0x7,0x1C,0x0
PALETTE_320x240x256_Color_120: db 0x0,0x1C,0x0
PALETTE_320x240x256_Color_121: db 0x0,0x1C,0x7
PALETTE_320x240x256_Color_122: db 0x0,0x1C,0xE
PALETTE_320x240x256_Color_123: db 0x0,0x1C,0x15
PALETTE_320x240x256_Color_124: db 0x0,0x1C,0x1C
PALETTE_320x240x256_Color_125: db 0x0,0x15,0x1C
PALETTE_320x240x256_Color_126: db 0x0,0xE,0x1C
PALETTE_320x240x256_Color_127: db 0x0,0x7,0x1C
PALETTE_320x240x256_Color_128: db 0xE,0xE,0x1C
PALETTE_320x240x256_Color_129: db 0x11,0xE,0x1C
PALETTE_320x240x256_Color_130: db 0x15,0xE,0x1C
PALETTE_320x240x256_Color_131: db 0x18,0xE,0x1C
PALETTE_320x240x256_Color_132: db 0x1C,0xE,0x1C
PALETTE_320x240x256_Color_133: db 0x1C,0xE,0x18
PALETTE_320x240x256_Color_134: db 0x1C,0xE,0x15
PALETTE_320x240x256_Color_135: db 0x1C,0xE,0x11
PALETTE_320x240x256_Color_136: db 0x1C,0xE,0xE
PALETTE_320x240x256_Color_137: db 0x1C,0x11,0xE
PALETTE_320x240x256_Color_138: db 0x1C,0x15,0xE
PALETTE_320x240x256_Color_139: db 0x1C,0x18,0xE
PALETTE_320x240x256_Color_140: db 0x1C,0x1C,0xE
PALETTE_320x240x256_Color_141: db 0x18,0x1C,0xE
PALETTE_320x240x256_Color_142: db 0x15,0x1C,0xE
PALETTE_320x240x256_Color_143: db 0x11,0x1C,0xE
PALETTE_320x240x256_Color_144: db 0xE,0x1C,0xE
PALETTE_320x240x256_Color_145: db 0xE,0x1C,0x11
PALETTE_320x240x256_Color_146: db 0xE,0x1C,0x15
PALETTE_320x240x256_Color_147: db 0xE,0x1C,0x18
PALETTE_320x240x256_Color_148: db 0xE,0x1C,0x1C
PALETTE_320x240x256_Color_149: db 0xE,0x18,0x1C
PALETTE_320x240x256_Color_150: db 0xE,0x15,0x1C
PALETTE_320x240x256_Color_151: db 0xE,0x11,0x1C
PALETTE_320x240x256_Color_152: db 0x14,0x14,0x1C
PALETTE_320x240x256_Color_153: db 0x16,0x14,0x1C
PALETTE_320x240x256_Color_154: db 0x18,0x14,0x1C
PALETTE_320x240x256_Color_155: db 0x1A,0x14,0x1C
PALETTE_320x240x256_Color_156: db 0x1C,0x14,0x1C
PALETTE_320x240x256_Color_157: db 0x1C,0x14,0x1A
PALETTE_320x240x256_Color_158: db 0x1C,0x14,0x18
PALETTE_320x240x256_Color_159: db 0x1C,0x14,0x16
PALETTE_320x240x256_Color_160: db 0x1C,0x14,0x14
PALETTE_320x240x256_Color_161: db 0x1C,0x16,0x14
PALETTE_320x240x256_Color_162: db 0x1C,0x18,0x14
PALETTE_320x240x256_Color_163: db 0x1C,0x1A,0x14
PALETTE_320x240x256_Color_164: db 0x1C,0x1C,0x14
PALETTE_320x240x256_Color_165: db 0x1A,0x1C,0x14
PALETTE_320x240x256_Color_166: db 0x18,0x1C,0x14
PALETTE_320x240x256_Color_167: db 0x16,0x1C,0x14
PALETTE_320x240x256_Color_168: db 0x14,0x1C,0x14
PALETTE_320x240x256_Color_169: db 0x14,0x1C,0x16
PALETTE_320x240x256_Color_170: db 0x14,0x1C,0x18
PALETTE_320x240x256_Color_171: db 0x14,0x1C,0x1A
PALETTE_320x240x256_Color_172: db 0x14,0x1C,0x1C
PALETTE_320x240x256_Color_173: db 0x14,0x1A,0x1C
PALETTE_320x240x256_Color_174: db 0x14,0x18,0x1C
PALETTE_320x240x256_Color_175: db 0x14,0x16,0x1C
PALETTE_320x240x256_Color_176: db 0x0,0x0,0x10
PALETTE_320x240x256_Color_177: db 0x4,0x0,0x10
PALETTE_320x240x256_Color_178: db 0x8,0x0,0x10
PALETTE_320x240x256_Color_179: db 0xC,0x0,0x10
PALETTE_320x240x256_Color_180: db 0x10,0x0,0x10
PALETTE_320x240x256_Color_181: db 0x10,0x0,0xC
PALETTE_320x240x256_Color_182: db 0x10,0x0,0x8
PALETTE_320x240x256_Color_183: db 0x10,0x0,0x4
PALETTE_320x240x256_Color_184: db 0x10,0x0,0x0
PALETTE_320x240x256_Color_185: db 0x10,0x4,0x0
PALETTE_320x240x256_Color_186: db 0x10,0x8,0x0
PALETTE_320x240x256_Color_187: db 0x10,0xC,0x0
PALETTE_320x240x256_Color_188: db 0x10,0x10,0x0
PALETTE_320x240x256_Color_189: db 0xC,0x10,0x0
PALETTE_320x240x256_Color_190: db 0x8,0x10,0x0
PALETTE_320x240x256_Color_191: db 0x4,0x10,0x0
PALETTE_320x240x256_Color_192: db 0x0,0x10,0x0
PALETTE_320x240x256_Color_193: db 0x0,0x10,0x4
PALETTE_320x240x256_Color_194: db 0x0,0x10,0x8
PALETTE_320x240x256_Color_195: db 0x0,0x10,0xC
PALETTE_320x240x256_Color_196: db 0x0,0x10,0x10
PALETTE_320x240x256_Color_197: db 0x0,0xC,0x10
PALETTE_320x240x256_Color_198: db 0x0,0x8,0x10
PALETTE_320x240x256_Color_199: db 0x0,0x4,0x10
PALETTE_320x240x256_Color_200: db 0x8,0x8,0x10
PALETTE_320x240x256_Color_201: db 0xA,0x8,0x10
PALETTE_320x240x256_Color_202: db 0xC,0x8,0x10
PALETTE_320x240x256_Color_203: db 0xE,0x8,0x10
PALETTE_320x240x256_Color_204: db 0x10,0x8,0x10
PALETTE_320x240x256_Color_205: db 0x10,0x8,0xE
PALETTE_320x240x256_Color_206: db 0x10,0x8,0xC
PALETTE_320x240x256_Color_207: db 0x10,0x8,0xA
PALETTE_320x240x256_Color_208: db 0x10,0x8,0x8
PALETTE_320x240x256_Color_209: db 0x10,0xA,0x8
PALETTE_320x240x256_Color_210: db 0x10,0xC,0x8
PALETTE_320x240x256_Color_211: db 0x10,0xE,0x8
PALETTE_320x240x256_Color_212: db 0x10,0x10,0x8
PALETTE_320x240x256_Color_213: db 0xE,0x10,0x8
PALETTE_320x240x256_Color_214: db 0xC,0x10,0x8
PALETTE_320x240x256_Color_215: db 0xA,0x10,0x8
PALETTE_320x240x256_Color_216: db 0x8,0x10,0x8
PALETTE_320x240x256_Color_217: db 0x8,0x10,0xA
PALETTE_320x240x256_Color_218: db 0x8,0x10,0xC
PALETTE_320x240x256_Color_219: db 0x8,0x10,0xE
PALETTE_320x240x256_Color_220: db 0x8,0x10,0x10
PALETTE_320x240x256_Color_221: db 0x8,0xE,0x10
PALETTE_320x240x256_Color_222: db 0x8,0xC,0x10
PALETTE_320x240x256_Color_223: db 0x8,0xA,0x10
PALETTE_320x240x256_Color_224: db 0xB,0xB,0x10
PALETTE_320x240x256_Color_225: db 0xC,0xB,0x10
PALETTE_320x240x256_Color_226: db 0xD,0xB,0x10
PALETTE_320x240x256_Color_227: db 0xF,0xB,0x10
PALETTE_320x240x256_Color_228: db 0x10,0xB,0x10
PALETTE_320x240x256_Color_229: db 0x10,0xB,0xF
PALETTE_320x240x256_Color_230: db 0x10,0xB,0xD
PALETTE_320x240x256_Color_231: db 0x10,0xB,0xC
PALETTE_320x240x256_Color_232: db 0x10,0xB,0xB
PALETTE_320x240x256_Color_233: db 0x10,0xC,0xB
PALETTE_320x240x256_Color_234: db 0x10,0xD,0xB
PALETTE_320x240x256_Color_235: db 0x10,0xF,0xB
PALETTE_320x240x256_Color_236: db 0x10,0x10,0xB
PALETTE_320x240x256_Color_237: db 0xF,0x10,0xB
PALETTE_320x240x256_Color_238: db 0xD,0x10,0xB
PALETTE_320x240x256_Color_239: db 0xC,0x10,0xB
PALETTE_320x240x256_Color_240: db 0xB,0x10,0xB
PALETTE_320x240x256_Color_241: db 0xB,0x10,0xC
PALETTE_320x240x256_Color_242: db 0xB,0x10,0xD
PALETTE_320x240x256_Color_243: db 0xB,0x10,0xF
PALETTE_320x240x256_Color_244: db 0xB,0x10,0x10
PALETTE_320x240x256_Color_245: db 0xB,0xF,0x10
PALETTE_320x240x256_Color_246: db 0xB,0xD,0x10
PALETTE_320x240x256_Color_247: db 0xB,0xC,0x10
PALETTE_320x240x256_Color_248: db 0x0,0x0,0x0
PALETTE_320x240x256_Color_249: db 0x0,0x0,0x0
PALETTE_320x240x256_Color_250: db 0x0,0x0,0x0
PALETTE_320x240x256_Color_251: db 0x0,0x0,0x0
PALETTE_320x240x256_Color_252: db 0x0,0x0,0x0
PALETTE_320x240x256_Color_253: db 0x0,0x0,0x0
PALETTE_320x240x256_Color_254: db 0x0,0x0,0x0
PALETTE_320x240x256_Color_255: db 0x0,0x0,0x0
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Register Values for Mode X (Default text font)
Default Text Font, Mode X, Graphics, 320x240x256 Colors, MCGA
This is a graphics mode so it doesn't use text fonts.
Instead you'll need direct drawing techniques along with the default font to get text with your own routines. We don't provide it here (it would be part of a drawing tutorial).
Anyway, in this mode we would effectively get a text area with an 40x12x256 colors resolution implemented in software.
This is a graphics mode so it doesn't use text fonts.
Instead you'll need direct drawing techniques along with the default font to get text with your own routines. We don't provide it here (it would be part of a drawing tutorial).
Anyway, in this mode we would effectively get a text area with an 40x12x256 colors resolution implemented in software.
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Re: Implementing a Function to Switch Standard VGA Video Mod
Why is this guy allowed to spam the forums?
Re: Implementing a Function to Switch Standard VGA Video Mod
He is just trying to help people. I think the idea is that we can link back to this whenever someone has a question on VGA programming. But the problems are (1) its unnecessarily complicated, (2) its unnecessarily large, (3) it encourages directly programming VGA hardware without (a) addressing the fact that directly programming the VGA can be dangerous, and (b) most modern systems don't properly support VGA; at most all they do is partially implement a subset of VGA. So not only is the code long and over-complicated, it also won't work on many systems.
OS Development Series | Wiki | os | ncc
char c[2]={"\x90\xC3"};int main(){void(*f)()=(void(__cdecl*)(void))(void*)&c;f();}
char c[2]={"\x90\xC3"};int main(){void(*f)()=(void(__cdecl*)(void))(void*)&c;f();}
Re: Implementing a Function to Switch Standard VGA Video Mod
How is posting RGB palettes over and over helping anyone?
Generic Function to Write the VGA Register Set Sequentially
Writing the Main VGA Register Set (Step/Parameter 1)
Now that we have all of the basic data configuration for the main standard VGA video modes, we need an internal function that will let us copy the values of the structures into the VGA registers.
This function only writes the main VGA register set.
We will also keep functions specific to write the Palette as well as to write text fonts into the VGA memory when we are in text mode.
What it does is:
- Turn off the monitor (it makes the VGA work faster and it's good for configuring the video mode)
* Write the Miscellaneous Output Register
* Write the Feature Control Register
* Write the 5 indexed Sequence Registers
- Unprotect the CRTC Registers 0-7
* Write the 25 indexed CRTC Registers
* Write the 9 indexed Graphics Controller Registers
- Reset the Flip/Flop of the Attribute Controller by reading a byte from Feature Control Register at port 0x3DA (color) or 0x3BA (mono)
* Write the 21 indexed Attribute Controller Registers
- Reset the Flip/Flop again reading a byte from Feature Control Register at port 0x3DA (color) or 0x3BA (mono)
- Enable the 16-color palette from the main register set
- Turn on the monitor with the new display mode configured
NOTE: We write all indexed registers in all controllers in one pass, using DX containing the index in DL and the data in DX. The exception is the Attribute Controller Register, which is an exception since it switches the Flip/Flop every time we access it. The Attribute Controller Register switches to the Index byte port and then to the Data byte port when we write it 8 bits at a time. If we try to write it 16 bits at a time, we will only access the Index Register discarding the higher 8 bits, so we must write 8 bits for the Index byte port, and then let the Flip/Flop select the Data byte port, and then perform a second write to write the Data byte.
This is the main function that will let us switch standard video modes, but obviously we must clean it up and add the rest of the code for the other functions (and name them better).
This is the initial function to further standardize:
Code: Select all
;Inputs:
;---------------
;BX: Value bits to select mono or color port:
; --
; 0000000001000000b -- color (produce 0x3DA)
; 0000000000100000b -- mono (produce 0x3BA)
; --
;
;ESI == Base address of the register set
;;
VGA_Config_All_Regs:
pusha
mov ah,00100000b ;Turn monitor off
call VGA_Sequencer_Monitor_OnOff
;Set the registers counter to 0:
;;
xor ecx,ecx
;Write Miscellaneous Output Register:
;;
mov dx,0x3C2 ;Point to the register
lodsb ;Load the byte value
out dx,al ;Set the register
;INIT: 0x3DA or 0x3BA
;INIT: 0x3DA or 0x3BA
;INIT: 0x3DA or 0x3BA
;Apply the selection value for the color/mono register.
;This will complete the value for 0x3DA or 0x3BA,
;respectively:
;;
mov dx,0x39A ;Point to the register
or dx,bx
;END: 0x3DA or 0x3BA
;END: 0x3DA or 0x3BA
;END: 0x3DA or 0x3BA
lodsb ;Load the byte value
;Write Feature Control Register:
;;
out dx,al ;Set the register
;Write Sequencer Registers:
;;
mov dx,0x3C4 ;Point to the Sequencer
mov cl,5 ;Load the number of Sequencer registers to write
call VGA_write_indexed_registers_WORD ;Write all registers
;Write CRTC Registers:
;;
mov dx,0x3D4 ;Point to the CRTC
xor eax,eax ;First unprotect CRTC regs 0-7
call VGA_protect_unprotect_CRTC_regs
mov cl,25 ;Load the number of CRTC registers to write
call VGA_write_indexed_registers_WORD ;Write all registers
;Write Graphics Controller Registers:
;;
mov dx,0x3CE ;Point to the Graphics Controller
mov cl,9 ;Load the number of Graphics registers to write
call VGA_write_indexed_registers_WORD ;Write all registers
;INIT: 0x3DA or 0x3BA
;INIT: 0x3DA or 0x3BA
;INIT: 0x3DA or 0x3BA
;Apply the selection value for the color/mono register.
;This will complete the value for 0x3DA or 0x3BA,
;respectively:
;;
mov dx,0x39A ;Point to the register
or dx,bx
;END: 0x3DA or 0x3BA
;END: 0x3DA or 0x3BA
;END: 0x3DA or 0x3BA
in al,dx ;First reset the flip/flop
;by reading port 0x3DA
;Write Attribute Control Registers:
;;
mov dx,0x3C0 ;Point to the Attribute Controller
mov cl,21 ;Load the number of Attribute registers to write
call VGA_write_indexed_registers_BYTE ;Write all registers
;INIT: 0x3DA or 0x3BA
;INIT: 0x3DA or 0x3BA
;INIT: 0x3DA or 0x3BA
;Apply the selection value for the color/mono register.
;This will complete the value for 0x3DA or 0x3BA,
;respectively:
;;
mov dx,0x39A ;Point to the register
or dx,bx
;END: 0x3DA or 0x3BA
;END: 0x3DA or 0x3BA
;END: 0x3DA or 0x3BA
in al,dx ;Reset the flip/flop again
;for full safety that this controller
;will be well aligned for future accesses
;We need to enable access to the palette because
;the standard way to program the Attribute Controller
;requires disabling access to it and then enable it,
;since it is also located in the Attribute Controller's
;index register:
;;
call VGA_Attribute_Controller__EnablePalette
mov bx,11011111b ;Turn monitor on
call VGA_Sequencer_Monitor_OnOff
;INIT: 0x3DA or 0x3BA
;INIT: 0x3DA or 0x3BA
;INIT: 0x3DA or 0x3BA
;Read Feature Control Register:
;Apply the selection value for the color/mono register.
;This will complete the value for 0x3DA or 0x3BA,
;respectively:
;;
mov dx,0x39A ;Point to the register
or dx,bx
;END: 0x3DA or 0x3BA
;END: 0x3DA or 0x3BA
;END: 0x3DA or 0x3BA
in al,dx ;Reset the flip/flop again
;for full safety that this controller
;will be well aligned for future accesses
;We have finished!
;;
popa
ret
Last edited by ~ on Tue May 24, 2016 11:52 pm, edited 7 times in total.
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Writing the Indexed VGA Registers
Writing the Indexed Registers of the Controllers Embedded in the VGA
We will use the following 2 functions to write the different controllers that are embedded in the VGA, which use indexed registers (an index port and a data port).
There are 2 versions of the function. The first one writes 16 bits (2 bytes) in a single write to specify the index and the data. Most controllers support it except for the Attribute Controller, which only supports 8-bit writes at a time.
So we use the first version, that performs 16-bit writes at a time, for most operations for performance and shorter code; and the second version, that performs 8-bit writes at a time, only for the Attribute Controller Register, where it's really obligatory.
Code: Select all
;ESI == Structure to point to
;ECX == Number of registers
;;
VGA_write_indexed_registers_WORD:
push eax
push ecx
xor eax,eax ;Write all registers
.l1:
mov ah,[esi] ;Take the byte value
inc esi ;Go to the next byte for next iteration
out dx,ax ;Send that index/value pair
inc al ;Increment the index
loop .l1 ;Do this for all of the registers
pop ecx
pop eax
ret
;ESI == Buffer to point to
;ECX == Number of registers
;;
VGA_write_indexed_registers_BYTE:
push eax
push ecx
xor eax,eax ;Write all registers
.l1:
mov ah,[esi] ;Take the byte value
inc esi ;Go to the next byte for next iteration
out dx,al ;Send the index
xchg al,ah ;Put the value in AL
out dx,al ;Send the value
xchg al,ah ;Put the index back in AL
inc al ;Increment the index
loop .l1 ;Do this for all of the registers
pop ecx
pop eax
ret
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-
Kazinsal
- Member
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- Joined: Wed Jul 13, 2011 7:38 pm
- Libera.chat IRC: Kazinsal
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- Contact:
Re: Implementing a Function to Switch Standard VGA Video Mod
He shouldn't be. This thread should be locked and the poster discouraged from using the forum database as a repository for his ramblings.kzinti wrote:Why is this guy allowed to spam the forums?
OP: We already have a wiki page on VGA hardware. It explains a lot about video generation hardware and how to program it, without dumping a bunch of difficult to understand code.
Re: Implementing a Function to Switch Standard VGA Video Mod
This is the kind of topics that originally existed since MegaTokyo. The wiki seems to be a wiki with a lot of information and theory-oriented; but these topics that I write as tutorials are oriented to present full working applications with highly-documented source code, and libraries at the end. It has an index at the start of the topic.Kazinsal wrote:He shouldn't be. This thread should be locked and the poster discouraged from using the forum database as a repository for his ramblings.kzinti wrote:Why is this guy allowed to spam the forums?
OP: We already have a wiki page on VGA hardware. It explains a lot about video generation hardware and how to program it, without dumping a bunch of difficult to understand code.
I intend to do it with the rest of elements that involve OS development. Absolutely everything about hardware and software. They are so many, but it's necessary to cover them once and for all from all of the very most basics.
As I said, this is what was being done since MegaTokyo, and most of the rest of topics in the forum seem too partial and too rambling-oriented to me, far too poor in the technical aspect that would serve most readers.
And the wiki doesn't encourage direct and immediate discussions. That can be left after this has been worked out.
So why not resume posting high-quality documentation and code like since 2004? I ALWAYS include a test that you can compile and run after the end of my tutorials and that you can use as the base of a set of libraries or library functions.
I take the time and effort to make sure that my code is NOT so simplistic as to miss vital details, and to actually give it production grade. It contains all that is needed and don't stop updating its resources until it is truly complete.
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Writing the VGA Function to Turn the Monitor On or Off
Turning the VGA Monitor On and Off
This function is part of the intrinsic functions contained in the Sequencer Controller. We can turn on or off the monitor by controlling bit 5 of the Clocking Mode Register (index 1) at the Sequencer Controller.
It gets to be a good and interesting power saving feature if it works in a given video card, which should if it's really compatible with the standard VGA at that function.
Code: Select all
;Inputs:
; AH == 00100000b -- turn monitor off
; AH == 11011111b -- turn monitor on
;;
VGA_Sequencer_Monitor_OnOff:
push eax
push edx
mov dx,0x3C4 ;Sequencer Index Register
mov al,01h ;Clocking Mode Register (Index 01h)
out dx,al ;Specify it!
mov dx,0x3C5 ;Sequencer Data Register
in al,dx ;Read it for Clocking Mode Register
cmp ah,11011111b ;A. See if it's a turning off request
jmp .default1 ;Skip code that's only to fix bogus request
.default0:
mov ah,11011111b
jmp .default_monitorOn
.default1:
jnz .ah_not_11011111b ;A. If not, see if it's for turning on
.default_monitorOn:
and al,ah ;Disable Monitor Off bit
jmp .executePortCommand
.ah_not_11011111b:
cmp ah,00100000b ;B. See if it's a turning on request
jne .default0 ;B. If not, turn on monitor by default
or al,ah ;Enable Monitor Off bit
.ah_not_00100000b:
.executePortCommand:
out dx,al ;Send it!
pop edx
pop eax
ret
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Re: Implementing a Function to Switch Standard VGA Video Mod
That's a very worrying statement. This guy intends to swamp the forums with noise rather than putting onformation in the proper place - the Wiki. That will ruin the forum as a place for discussion.I intend to do it with the rest of elements that involve OS development. Absolutely everything about hardware and software. They are so many, but it's necessary to cover them once and for all from all of the very most basics.