When interrput occurred,it will reboot.

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626788149
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When interrput occurred,it will reboot.

Post by 626788149 »

If I changed page directory ,when interrupt occurred. It will reboot. I have no idea about what is going on.
But If I don't execute '__asm __volatile("sti")',everything will be ok.
And If I don't change page directory and execute '__asm __volatile("sti")',interrupt works very well.




Code: Select all

f01000bf <os_init_main>:
f01000bf:	55                   	push   %ebp
f01000c0:	89 e5                	mov    %esp,%ebp
f01000c2:	83 ec 28             	sub    $0x28,%esp
f01000c5:	81 7d 0c 02 b0 ad 2b 	cmpl   $0x2badb002,0xc(%ebp)
f01000cc:	74 02                	je     f01000d0 <os_init_main+0x11>
f01000ce:	eb 5a                	jmp    f010012a <os_init_main+0x6b>
f01000d0:	ba c0 b2 2f f1       	mov    $0xf12fb2c0,%edx
f01000d5:	b8 00 94 11 f0       	mov    $0xf0119400,%eax
f01000da:	29 c2                	sub    %eax,%edx
f01000dc:	89 d0                	mov    %edx,%eax
f01000de:	89 44 24 08          	mov    %eax,0x8(%esp)
f01000e2:	c7 44 24 04 00 00 00 	movl   $0x0,0x4(%esp)
f01000e9:	00 
f01000ea:	c7 04 24 00 94 11 f0 	movl   $0xf0119400,(%esp)
f01000f1:	e8 1e 09 00 00       	call   f0100a14 <memset>
f01000f6:	8b 45 08             	mov    0x8(%ebp),%eax
f01000f9:	a3 bc 94 2f f1       	mov    %eax,0xf12f94bc
f01000fe:	83 7d 08 00          	cmpl   $0x0,0x8(%ebp)
f0100102:	75 02                	jne    f0100106 <os_init_main+0x47>
f0100104:	eb 24                	jmp    f010012a <os_init_main+0x6b>
f0100106:	e8 b2 46 00 00       	call   f01047bd <init_console>
f010010b:	e8 e4 44 00 00       	call   f01045f4 <init_mem>
f0100110:	e8 5e 55 00 00       	call   f0105673 <init_trap>
f0100115:	e8 0c 52 00 00       	call   f0105326 <init_8259A>
f010011a:	e8 aa 54 00 00       	call   f01055c9 <timerinit>
f010011f:	c7 45 f4 00 00 00 00 	movl   $0x0,-0xc(%ebp)
f0100126:	cd 20                	int    $0x20
f0100128:	eb fe                	jmp    f0100128 <os_init_main+0x69>
f010012a:	c9                   	leave  
f010012b:	c3                   	ret

Code: Select all


void os_init_main(multiboot_info_t* m,unsigned int magic)
{
	
	extern char _bss_start[],_bss_end[];
	if(magic != 0x2BADB002)
		return;

	memset(_bss_start,0,_bss_end - _bss_start);
	mbd = m;
	if(m == NULL)
		return;
	
	

	init_console();

	init_mem();

	init_trap();
	
	
	init_8259A();
	
	timerinit();
	//disable_8259A_irq(IRQ2_VECTOR);
	//enable_8259A_irq(IRQ1_VECTOR);
	//enable_8259A_irq(IRQ0_VECTOR);

	unsigned long  i = 0;

	//__asm __volatile("sti");
	__asm __volatile("int $32");
		
	
/*
	for(i;;i++)
	{
		__asm __volatile("cli");
		cprintf("pconpcon->buffer1[pcon->last_char++] = c;->buffer1[pcon->last_char++] = c;->%d \n",i);	
		__asm __volatile("sti");
		//cons_flush(tty->p_console);
	}
*/

	while(1);
}
}

Code: Select all

<bochs:1> b 0x100126
<bochs:2> c
00000004000e[XGUI  ] xkeypress(): keysym ffeb unhandled!
00000004661i[BIOS  ] $Revision: 12579 $ $Date: 2014-12-26 11:31:39 +0100 (Fr, 26. Dez 2014) $
00000318049i[KBD   ] reset-disable command received
00000320688i[PIDE  ] new BM-DMA address: 0xc000
00000326568i[P2ISA ] PCI IRQ routing: PIRQA# set to 0x0b
00000326584i[P2ISA ] write: ELCR2 = 0x08
00000326604i[ACPI  ] new irq line = 11
00000454402i[VBIOS ] VGABios $Id: vgabios.c,v 1.76 2013/02/10 08:07:03 vruppert Exp $
00000454473i[BXVGA ] VBE known Display Interface b0c0
00000454505i[BXVGA ] VBE known Display Interface b0c5
00000457430i[VBIOS ] VBE Bios $Id: vbe.c,v 1.65 2014/07/08 18:02:25 vruppert Exp $
00000600420i[XGUI  ] charmap update. Font Height is 16
00000794255i[BIOS  ] ata0-0: PCHS=99/16/63 translation=none LCHS=99/16/63
00004671461i[BIOS  ] IDE time out
00016745701i[BIOS  ] Booting from 0000:7c00
00129676551i[BXVGA ] VBE set bpp (32)
00129676573i[BXVGA ] VBE set xres (1024)
00129676612i[BXVGA ] VBE set yres (768)
00129676650i[BXVGA ] VBE enabling x 1024, y 768, bpp 32, 3145728 bytes visible
(0) Breakpoint 1, 0xf0100126 in ?? ()
Next at t=946635864
(0) [0x000000100126] 0010:f0100126 (unk. ctxt): int 0x20                  ; cd20
<bochs:3> s
00946635864i[CPU0  ] CPU is in protected mode (active)
00946635864i[CPU0  ] CS.mode = 32 bit
00946635864i[CPU0  ] SS.mode = 32 bit
00946635864i[CPU0  ] EFER   = 0x00000000
00946635864i[CPU0  ] | EAX=0000002e  EBX=00010000  ECX=00000b15  EDX=00000040
00946635864i[CPU0  ] | ESP=f0117fc8  EBP=f0117ff0  ESI=00000000  EDI=00000000
00946635864i[CPU0  ] | IOPL=0 id vip vif ac vm RF nt of df if tf SF zf AF PF cf
00946635864i[CPU0  ] | SEG sltr(index|ti|rpl)     base    limit G D
00946635864i[CPU0  ] |  CS:0010( 0002| 0|  0) 00000000 ffffffff 1 1
00946635864i[CPU0  ] |  DS:0018( 0003| 0|  0) 00000000 ffffffff 1 1
00946635864i[CPU0  ] |  SS:0018( 0003| 0|  0) 00000000 ffffffff 1 1
00946635864i[CPU0  ] |  ES:0018( 0003| 0|  0) 00000000 ffffffff 1 1
00946635864i[CPU0  ] |  FS:0018( 0003| 0|  0) 00000000 ffffffff 1 1
00946635864i[CPU0  ] |  GS:0018( 0003| 0|  0) 00000000 ffffffff 1 1
00946635864i[CPU0  ] | EIP=f0100126 (f0100126)
00946635864i[CPU0  ] | CR0=0xe0050033 CR2=0x001136b0
00946635864i[CPU0  ] | CR3=0x012fc000 CR4=0x00000010
(0).[946635864] [0x000000100126] 0010:f0100126 (unk. ctxt): int 0x20                  ; cd20
00946635864e[CPU0  ] exception(): 3rd (14) exception with no resolution, shutdown status is 00h, resetting
00946635864i[SYS   ] bx_pc_system_c::Reset(HARDWARE) called
00946635864i[CPU0  ] cpu hardware reset

Last edited by 626788149 on Thu Nov 05, 2015 3:22 am, edited 2 times in total.
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Re: When interrput occurred,it will reboot.

Post by Combuster »

Can you run it with logging enabled? Chances are you'll get the exact error squarely on your screen if you try that.
"Certainly avoid yourself. He is a newbie and might not realize it. You'll hate his code deeply a few years down the road." - Sortie
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626788149
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Re: When interrput occurred,it will reboot.

Post by 626788149 »

I have no idea what is going on

Code: Select all

<bochs:1> b 0x10014c
<bochs:2> c
00000004661i[BIOS  ] $Revision: 12579 $ $Date: 2014-12-26 11:31:39 +0100 (Fr, 26. Dez 2014) $
00000318049i[KBD   ] reset-disable command received
00000320688i[PIDE  ] new BM-DMA address: 0xc000
00000326568i[P2ISA ] PCI IRQ routing: PIRQA# set to 0x0b
00000326584i[P2ISA ] write: ELCR2 = 0x08
00000326604i[ACPI  ] new irq line = 11
00000454402i[VBIOS ] VGABios $Id: vgabios.c,v 1.76 2013/02/10 08:07:03 vruppert Exp $
00000454473i[BXVGA ] VBE known Display Interface b0c0
00000454505i[BXVGA ] VBE known Display Interface b0c5
00000457430i[VBIOS ] VBE Bios $Id: vbe.c,v 1.65 2014/07/08 18:02:25 vruppert Exp $
00000600324i[XGUI  ] charmap update. Font Height is 16
00000794255i[BIOS  ] ata0-0: PCHS=99/16/63 translation=none LCHS=99/16/63
00004671461i[BIOS  ] IDE time out
00016745701i[BIOS  ] Booting from 0000:7c00
00130292613i[BXVGA ] VBE set bpp (32)
00130292635i[BXVGA ] VBE set xres (1024)
00130292674i[BXVGA ] VBE set yres (768)
00130292712i[BXVGA ] VBE enabling x 1024, y 768, bpp 32, 3145728 bytes visible
(0) Breakpoint 1, 0xf010014c in ?? ()
Next at t=1003248355
(0) [0x00000010014c] 0010:f010014c (unk. ctxt): sti                       ; fb
<bochs:3> s
Next at t=1003248356
(0) [0x00000010014d] 0010:f010014d (unk. ctxt): mov eax, dword ptr ss:[ebp-12] ; 8b45f4
<bochs:4> s
Next at t=1003248357
(0) [0x000000100150] 0010:f0100150 (unk. ctxt): mov dword ptr ss:[esp+4], eax ; 89442404
<bochs:5> s
01003248357i[CPU0  ] CPU is in protected mode (active)
01003248357i[CPU0  ] CS.mode = 32 bit
01003248357i[CPU0  ] SS.mode = 32 bit
01003248357i[CPU0  ] EFER   = 0x00000000
01003248357i[CPU0  ] | EAX=00000000  EBX=00010000  ECX=00093c7a  EDX=00300003
01003248357i[CPU0  ] | ESP=f011dfc8  EBP=f011dff0  ESI=00000000  EDI=00000000
01003248357i[CPU0  ] | IOPL=0 id vip vif ac vm RF nt of df IF tf SF zf af PF cf
01003248357i[CPU0  ] | SEG sltr(index|ti|rpl)     base    limit G D
01003248357i[CPU0  ] |  CS:0010( 0002| 0|  0) 00000000 ffffffff 1 1
01003248357i[CPU0  ] |  DS:0018( 0003| 0|  0) 00000000 ffffffff 1 1
01003248357i[CPU0  ] |  SS:0018( 0003| 0|  0) 00000000 ffffffff 1 1
01003248357i[CPU0  ] |  ES:0018( 0003| 0|  0) 00000000 ffffffff 1 1
01003248357i[CPU0  ] |  FS:0018( 0003| 0|  0) 00000000 ffffffff 1 1
01003248357i[CPU0  ] |  GS:0018( 0003| 0|  0) 00000000 ffffffff 1 1
01003248357i[CPU0  ] | EIP=f0100150 (f0100150)
01003248357i[CPU0  ] | CR0=0xe0050033 CR2=0x00113810
01003248357i[CPU0  ] | CR3=0x01302000 CR4=0x00000010
(0).[1003248357] [0x000000100150] 0010:f0100150 (unk. ctxt): mov dword ptr ss:[esp+4], eax ; 89442404
01003248357e[CPU0  ] exception(): 3rd (14) exception with no resolution, shutdown status is 00h, resetting
01003248357i[SYS   ] bx_pc_system_c::Reset(HARDWARE) called
01003248357i[CPU0  ] cpu hardware reset
01003248357i[APIC0 ] allocate APIC id=0 (MMIO enabled) to 0x0000fee00000
01003248357i[CPU0  ] CPUID[0x00000000]: 00000005 756e6547 6c65746e 49656e69
01003248357i[CPU0  ] CPUID[0x00000001]: 00000633 00010800 00000008 1fcbfbff
01003248357i[CPU0  ] CPUID[0x00000002]: 00410601 00000000 00000000 00000000
01003248357i[CPU0  ] CPUID[0x00000003]: 00000000 00000000 00000000 00000000
01003248357i[CPU0  ] CPUID[0x00000004]: 00000000 00000000 00000000 00000000
01003248357i[CPU0  ] CPUID[0x00000005]: 00000040 00000040 00000003 00000020
01003248357i[PLUGIN] reset of 'pci' plugin device by virtual method
01003248357i[PLUGIN] reset of 'pci2isa' plugin device by virtual method
01003248357i[PLUGIN] reset of 'cmos' plugin device by virtual method
01003248357i[PLUGIN] reset of 'dma' plugin device by virtual method
01003248357i[PLUGIN] reset of 'pic' plugin device by virtual method
01003248357i[PLUGIN] reset of 'pit' plugin device by virtual method
01003248357i[PLUGIN] reset of 'vga' plugin device by virtual method
01003248357i[PLUGIN] reset of 'floppy' plugin device by virtual method
01003248357i[PLUGIN] reset of 'acpi' plugin device by virtual method
01003248357i[PLUGIN] reset of 'ioapic' plugin device by virtual method
01003248357i[PLUGIN] reset of 'keyboard' plugin device by virtual method
01003248357i[PLUGIN] reset of 'harddrv' plugin device by virtual method
01003248357i[PLUGIN] reset of 'pci_ide' plugin device by virtual method
01003248357i[PLUGIN] reset of 'unmapped' plugin device by virtual method
01003248357i[PLUGIN] reset of 'biosdev' plugin device by virtual method
01003248357i[PLUGIN] reset of 'speaker' plugin device by virtual method
01003248357i[PLUGIN] reset of 'extfpuirq' plugin device by virtual method
01003248357i[PLUGIN] reset of 'parallel' plugin device by virtual method
01003248357i[PLUGIN] reset of 'serial' plugin device by virtual method
01003248357i[PLUGIN] reset of 'iodebug' plugin device by virtual method
Next at t=1003248358
(0) [0x0000fffffff0] f000:fff0 (unk. ctxt): jmpf 0xf000:e05b          ; ea5be000f0
<bochs:6>
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Re: When interrput occurred,it will reboot.

Post by Combuster »

CR2=0x00113810
Looks like you got pagefaults.
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Re: When interrput occurred,it will reboot.

Post by 626788149 »

Combuster wrote:
CR2=0x00113810
Looks like you got pagefaults.
But I hava a interrput handler that handle all execption and interrput
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Re: When interrput occurred,it will reboot.

Post by CelestialMechanic »

626788149 wrote:
Combuster wrote:
CR2=0x00113810
Looks like you got pagefaults.
{Corrections mine} But I have an interrupt handler that handles all exceptions and interrupts.
I had this problem just days ago, so it is fresh in my memory. Have you set the linear address of the IDT to your high address range? I kept getting crashes with CR2=00003840. I thought I had reloaded my IDT to 0xf8003800, but I used in-line assembly and it chose a 16-bit operand override because I gave it the address of an array of 16-bit integers. I have since removed it to a part of the source that is written in assembler where it assembled as 32 bits and it now works fine.

What I am doing is this: I create the page tables before switching to protected mode. The first 272 pages (1M + 64K) are identity-mapped and also mapped starting at 0xf800000. I turn on protected mode and paging at the same time. Initially I have the GDT at 0x3000 and the IDT at 0x3800 but I "move" them to their high-address aliases at 0xf8003000 and 0xf8003800 respectively. Then I remove the identify mapping so that my microkernel operates entirely at the high-address. Perhaps I should create the page tables before the inital GDT and IDT and set GDT and IDT to the high addresses before switching to protected mode + paging. Then I won't have to "move" them later.

I sometimes see code that performs a far jump to the next instruction and then reloads the selector registers immediately after an LGDT. Of course this is necessary after turning on protected mode, but is this necessary after any change to the GDTR register? If such a thing is necessary to force the CPU to read from a "new" GDT, is there something similar that should be done after changing the IDTR?
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Re: When interrput occurred,it will reboot.

Post by 626788149 »

Have you set the linear address of the IDT to your high address range?

Thanks, but I have set the linear address of the IDT to high address range of the kernel.
The base address of the kernel is 0XF0000000,and I mapped all the address above the 0XF0000000 to the physical address begin at 0.
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Re: When interrput occurred,it will reboot.

Post by 626788149 »

Combuster wrote:
CR2=0x00113810
Looks like you got pagefaults.
I really don't know why I got pagefaults at 0x00113810.My kernel base address at 0xF00000000.
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Re: When interrput occurred,it will reboot.

Post by FusT »

Let's see what's going on here

Code: Select all

01003248357i[CPU0  ] | EIP=f0100150 (f0100150)
01003248357i[CPU0  ] | CR0=0xe0050033 CR2=0x00113810
01003248357i[CPU0  ] | CR3=0x01302000 CR4=0x00000010
So, EIP (The instruction pointer) is at 0xf0100150.
The code there is the final line of the disassembly:

Code: Select all

f010014c:   fb                      sti    
f010014d:   eb fe                   jmp    f010014d <os_init_main+0x9c>
f010014f:   c9                      leave  
f0100150:   c3                      ret 
Which, in C is:

Code: Select all

__asm __volatile("sti");
   while(1);
Now think about what exactly is going on.....
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Re: When interrput occurred,it will reboot.

Post by 626788149 »

FusT wrote:Let's see what's going on here

Code: Select all

01003248357i[CPU0  ] | EIP=f0100150 (f0100150)
01003248357i[CPU0  ] | CR0=0xe0050033 CR2=0x00113810
01003248357i[CPU0  ] | CR3=0x01302000 CR4=0x00000010
So, EIP (The instruction pointer) is at 0xf0100150.
The code there is the final line of the disassembly:

Code: Select all

f010014c:   fb                      sti    
f010014d:   eb fe                   jmp    f010014d <os_init_main+0x9c>
f010014f:   c9                      leave  
f0100150:   c3                      ret 
Which, in C is:

Code: Select all

__asm __volatile("sti");
   while(1);
Now think about what exactly is going on.....

.....
How could instructions flow arrive at f0100150? I have a jmp f010014d at f010014d ..
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Re: When interrput occurred,it will reboot.

Post by FusT »

Can you post your bootstrap assembly file?
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Re: When interrput occurred,it will reboot.

Post by 626788149 »

FusT wrote:Can you post your bootstrap assembly file?

Code: Select all


.section .mbHeader
mboot:
	.long MULTIBOOT_HEADER_MAGIC
	.long MULTIBOOT_HEADER_FLAGS
	.long CHECKSUM
	.fill 5 ,4 ,0
	.long 0x00
	.long 1024
	.long 768
	.long 32


.text
// entry point
.globl  start, _start  
start: 
_start:
	cli
	movl	$RELOC(bootstacktop),%esp
	push    %eax
	call    init_entrypgdir
	pop	%eax
	movl	$(RELOC(entry_pgdir)),%ecx
	movl	%ecx,%cr3

	movl	%cr4,%ecx
	orl     $CR4_PSE,%ecx	
	movl	%ecx, %cr4

	movl	%cr0, %ecx
	orl	$(CR0_PE|CR0_PG|CR0_WP), %ecx
	movl	%ecx, %cr0

	movl	$redir,%ecx

	jmp	*%ecx
redir:
	movl	$bootstacktop,%esp
	movl	$0x0,%ebp
	push 	%eax
	push 	%ebx
	
	
	call	os_init_main
	
spin:	jmp	spin

.data
// boot stack
	.p2align	12		# force page alignment
	.globl		bootstack
bootstack:
	.space		KERNEL_STKSIZE	
	.globl		bootstacktop   
bootstacktop:

Code: Select all

#define	RELOC(x) ((x) - KERNEL_BASE_ADDR)

__attribute__((__aligned__(PGSIZE)))
pde_t  entry_pgdir[NPDENTRIES] = {1};


void init_entrypgdir(void){
	uint32_t bar;
	pde_t* foo = (pde_t*)((char*)entry_pgdir - KERNEL_BASE_ADDR);
	for(bar = 0; bar < 1024; bar++){
		foo[bar] = (bar << 22 ) | PTE_W | PTE_P | PTE_PS;
	}
	foo[(KERNEL_BASE_ADDR >> 22)] =  PTE_W | PTE_P | PTE_PS;
	for(bar = 0;bar <= PDX(HIGHPHYSMEM); bar++){
		///HIGHPHYSMEM 0x00000000 ~ HIGHPHYSMEM = KERNEL_BASE_ADDR ~ KERNEL_BASE_ADDR + HIGHPHYSMEM
		foo[(KERNEL_BASE_ADDR >> 22) + bar] = (bar << 22) | PTE_W | PTE_P | PTE_PS;
	}

}

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Re: When interrput occurred,it will reboot.

Post by FusT »

That all seems right to me, though I'd put a "cli" and "hlt" after the call to os_init_main just to be safe.

Are you 100% sure your interrupt handler is registered correctly and your IDT is valid?
The VM reboots because a PF occurs which isn't being handled. That in turn causes a triple fault and the VM reboots.
To prevent it from rebooting you should put "panic: action=ask" in your bochsrc file, it then gives you the option to hand over control to gdb.

tl;dr:
Adding a breakpoint at the faulting address and dumping the IDT/GDT to check if they're valid would be my next move.
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Re: When interrput occurred,it will reboot.

Post by 626788149 »

FusT wrote:That all seems right to me, though I'd put a "cli" and "hlt" after the call to os_init_main just to be safe.

Are you 100% sure your interrupt handler is registered correctly and your IDT is valid?
The VM reboots because a PF occurs which isn't being handled. That in turn causes a triple fault and the VM reboots.
To prevent it from rebooting you should put "panic: action=ask" in your bochsrc file, it then gives you the option to hand over control to gdb.

tl;dr:
Adding a breakpoint at the faulting address and dumping the IDT/GDT to check if they're valid would be my next move.

Thanks for your reminding. I find the bug .!
Since my kerenl take control over from Grub.I don't have set up GDT.....
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Re: When interrput occurred,it will reboot.

Post by FusT »

That would indeed explain it. Good luck and happy devving :)
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