One more page enabling failure

[superdupermicrochip]

I started writing an OS and tried to follow the meaty skeleton and then the higher half kernel. I copied it line by line (except that I translated it to AT&T syntax) and somehow it got faulty.
First problem seemed to be lack of "OUTPUT_FORMAT(elf32-i386)" line at the beginning of the .ld script, because without it, the whole thing didn't agree to boot at all.
And now I'm stuck because when I enable paging I get triple fault and the VM reboots.

Here's the code:

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BootPageDirectory:
	.byte 0x83
	.byte 0
	.byte 0
	.byte 0
	.fill (KERNEL_PAGE_NUMBER - 1), 4, 0x0
	.byte 0x83
	.byte 0
	.byte 0
	.byte 0
	.fill (1024 - KERNEL_PAGE_NUMBER - 1), 4, 0x0
....
.global start
start:
	mov %cr4,%ecx
	or $0x10, %ecx # Set PSE bit in CR4 to enable 4MB pages.
	mov %ecx,%cr4

	mov $(BootPageDirectory - KERNEL_VIRTUAL_BASE),%ecx
	# $(BootPageDirectory - KERNEL_VIRTUAL_BASE) == 0x00102004

	mov %ecx,%cr3 # Load Page Directory Base Register.

	mov %cr0,%ecx
	or $0x80000000, %ecx # Set PG bit in CR0 to enable paging.
	mov %ecx, %cr0
# triple fault here ^

	lea (high_start), %ecx	
	jmp *%ecx

	# Hang if kernel_main unexpectedly returns.
	cli
	hlt

After that mov %ecx, %cr0 the VM reboots.

In similair topics I read about setting the EIP properly, but it seems to be perfectly fine although I didn't set it up:

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<bochs:61> page cs:eip
linear page 0x0000000000100000 maps to physical page 0x000000100000

Could you please help me a bit?

[xenos]

Since you are using Bochs, what does the Bochs log tell you about the reason for the triple fault?

[iansjack]

Have you set up an IDT and exception handlers for at least General Protection and Page faults? Without these any exception is going to immediately produce a triple fault.

[SpyderTL]

Do you know where this code is being loaded in memory? Is that address mapped in your page table, and marked as "present"?

If not, it'll immediately throw a page fault.

These two sentences represent my complete understanding of paging, by the way.

[superdupermicrochip]

Bochs doesn't tell anything interesting:

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00294289513i[CPU0  ] CPU is in protected mode (active)
00294289513i[CPU0  ] CS.mode = 32 bit
00294289513i[CPU0  ] SS.mode = 32 bit
00294289513i[CPU0  ] EFER   = 0x00000000
00294289513i[CPU0  ] | EAX=dead0001  EBX=00010000  ECX=e0000011  EDX=00000000
00294289513i[CPU0  ] | ESP=0007ff00  EBP=00000000  ESI=00000000  EDI=00000000
00294289513i[CPU0  ] | IOPL=0 ID vip vif ac vm RF nt of df if tf SF zf af PF cf
00294289513i[CPU0  ] | SEG sltr(index|ti|rpl)     base    limit G D
00294289513i[CPU0  ] |  CS:0010( 0002| 0|  0) 00000000 ffffffff 1 1
00294289513i[CPU0  ] |  DS:0018( 0003| 0|  0) 00000000 ffffffff 1 1
00294289513i[CPU0  ] |  SS:0018( 0003| 0|  0) 00000000 ffffffff 1 1
00294289513i[CPU0  ] |  ES:0018( 0003| 0|  0) 00000000 ffffffff 1 1
00294289513i[CPU0  ] |  FS:0018( 0003| 0|  0) 00000000 ffffffff 1 1
00294289513i[CPU0  ] |  GS:0018( 0003| 0|  0) 00000000 ffffffff 1 1
00294289513i[CPU0  ] | EIP=0010014c (0010014c)
00294289513i[CPU0  ] | CR0=0xe0000011 CR2=0x0010014c
00294289513i[CPU0  ] | CR3=0x00102004 CR4=0x00000010
00294289513e[CPU0  ] exception(): 3rd (13) exception with no resolution, shutdown status is 00h, resetting
00294289513i[SYS   ] bx_pc_system_c::Reset(HARDWARE) called
00294289513i[CPU0  ] cpu hardware reset

I've followed articles on wiki and they didn't say anything about interrupt handlers yet. I though it should be though of afterwards..

As you see, CR3 contains physical address of the page table (with 4MB pages enabled), EIP points somewhere after the starting point (0x100120), so I thing it's perfectly fine.
The value of EAX is a mark that some point was passed (CR0 value preparation).

EDIT: page table contains 0x83 as its first element and one more 0x83 in the last fourth of the table.

[xenos]

Bochs clearly shows that you get a page fault on instruction fetch at CR2 = EIP = 0x0010014c and that CR3 = 0x00102004 is not page aligned.

[iansjack]

The value in CR3 doesn't, by itself, indicate that the Page Directory isn't page aligned. By definition CR3 will always point to a page aligned location. But it does mean that the Page Directory doesn't start where the OP thinks it does, which isn't good.

Also, since at the time you load CR3 you haven't enabled paging, I don't see the purpose of

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mov $(BootPageDirectory - KERNEL_VIRTUAL_BASE),%ecx

rather than just

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mov $BootPageDirectory, %ecx

[tkausl]

Also, since at the time you load CR3 you haven't enabled paging, I don't see the purpose of

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mov $(BootPageDirectory - KERNEL_VIRTUAL_BASE),%ecx

rather than just

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mov $BootPageDirectory, %ecx

Correct me if i'm wrong, but since the linker links it as if it were at the higher half in memory, 'BootPageDirectory' points to the virtual address of the table, not the actual physical address.

[iansjack]

As I can't see your linker script, or much of your code, I'll take your word for it that you are putting the correct physical address of the Page Table into %ECX.

The problem is that your table is located at 0x00102004 and your are telling the CPU that it is located at 0x00102000; that's not really a good idea.

[superdupermicrochip]

Thank you very much, people, I've managed to understand the same thing by myself after reading i486 man:)