What happens on interrupt in long mode

[mpiechotka]

I have trouble finding this information - most things I find are either tutorials (mostly 32 bit) which don't really explain much (well - I can use it and it will probably work but I won't know how or why) or structure description. I was trying to find it in Intel manual but it seems to be spread out across several chapters (5-7) and concentrate on structures as well - furthermore it describes long mode only as differences to protected mode. That makes it hard to find information if you don't really know where to look for it.

What happens when there is exception or interrupt in long mode? I believe that IDT is used to lookup the interrupt service routine start address (offset field) and type (type field). It does also check if current code can call it (in case of software interrupts) and change it to #GP if it cannot but I cannot see any further information. What are the steps of processor when it gets an interrupt in long mode?

[SpyderTL]

The wiki entry on IDT explains a lot of this, and even talks about the differences between 32 and 64-bit operation.

But in general, the procedure is the same. When an interrupt is triggered by an INT instruction, or an IRQ, the CPU looks up the interrupt number in the IDT to get a segment and an offset for the interrupt handler routine, pushes the current IP/EIP/RIP to the stack, pushes any additional information to the stack (like error numbers, etc.), then jumps to the interrupt handler routine.

Is there something specific that you want to know about?

[mpiechotka]

The wiki entry on IDT explains a lot of this, and even talks about the differences between 32 and 64-bit operation.

But in general, the procedure is the same. When an interrupt is triggered by an INT instruction, or an IRQ, the CPU looks up the interrupt number in the IDT to get a segment and an offset for the interrupt handler routine, pushes the current IP/EIP/RIP to the stack,

Thanks. I've through that there is an automatic stack switch for example (as with say sysenter or sysexit).

pushes any additional information to the stack (like error numbers, etc.), then jumps to the interrupt handler routine.

What prevents a userspace thread running on separate core from corrupting this information?

[Candy]

There's a mechanism called IST stack switch. Three bits in the IDT entry are used to indicate which IST stack to use. The IST stacks can be found in the 64-bit TSS. On entry it always switches to the indicated IST stack.

Note that you should actively prevent an IST stack from being used concurrently (on 2 cores) or reentrantly (interrupting an interrupt handler); both won't work and will cause weird crashes.

When you have IST working, you can also re-enable the red zone for other code. This is why tutorials say you should disable it.

[embryo2]

I have trouble finding this information - most things I find are either tutorials (mostly 32 bit) which don't really explain much (well - I can use it and it will probably work but I won't know how or why) or structure description. I was trying to find it in Intel manual but it seems to be spread out across several chapters (5-7) and concentrate on structures as well - furthermore it describes long mode only as differences to protected mode. That makes it hard to find information if you don't really know where to look for it.

The best way to understand the 64-bit modes is to read first about 32-bit modes. There is very detailed explanation of what's going on in Intel's manual for 32-bit modes and 64-bit modes just add some minor corrections to the 32-bit modes behavior. So, if you miss something while you are reading about a 64-bit interrupt it is highly probable you can find it when read about 32-bit interrupt.

[mpiechotka]

Thanks. I found what I asked for in the Volume 2 (instruction set) as it was combined with INT instruction description.