I've recently got my HPET driver running, using standard mapping / IOAPIC.
It would seem unfortunately that FSB delivery is not supported by qemu or virtualbox making it a bit harder to test but never the less I want it
I've not yet really looked into MSI/x for PCI apart from basic skimming of the pcie spec/intel manuals, how exactly should one use the FSB route register?
Tn_FSB_INT_ADDR | Tn_FSB_INT_VAL
The spec says the value will be written to the addr.. that isn't very clear.
With the PCI documents the message and data registers describe a vector no, delivery mode, local apic id etc so they make more sense as to how that would trigger an interrupt, whereas this FSB register isn't very well described?