DI not supported (See Why Combusters shame is always hidden)

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embryo

DI not supported (See Why Combusters shame is always hidden)

Post by embryo »

Combuster wrote:Thinking that you know while you don't know is a disease.
Pretending that you know even more is much worse.
Combuster wrote:Go read the manual since this is wrong and very, very basic assembly.
Well, I can hint about processor modes. Next we can see what's wrong with basic assembly in Intel's manual (or is it somebody's overconfidence?).
Gigasoft
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Re: Introduction of nop 'fixes' rep movsb

Post by Gigasoft »

embryo wrote:
Combuster wrote:Thinking that you know while you don't know is a disease.
Pretending that you know even more is much worse.
Combuster wrote:Go read the manual since this is wrong and very, very basic assembly.
Well, I can hint about processor modes. Next we can see what's wrong with basic assembly in Intel's manual (or is it somebody's overconfidence?).
In that case, you should go to the store and get it replaced or your money back. Your CPU has a manufacturing defect. If the [di+nnnn] addressing mode suddenly stopped working, it's a surprise that your computer even boots.
embryo

Re: Introduction of nop 'fixes' rep movsb

Post by embryo »

Gigasoft wrote:Your CPU has a manufacturing defect. If the [di+nnnn] addressing mode suddenly stopped working, it's a surprise that your computer even boots.
Have you read the manual carefully enough? But it seems even my post was skipped.
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Combuster
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Re: Introduction of nop 'fixes' rep movsb

Post by Combuster »

embryo wrote:
Gigasoft wrote:Your CPU has a manufacturing defect. If the [di+nnnn] addressing mode suddenly stopped working, it's a surprise that your computer even boots.
Have you read the manual carefully enough? But it seems even my post was skipped.
Instead of trolling and throwing a tantrum over being corrected, you can cite the relevant portion of the manual - if it exists.
"Certainly avoid yourself. He is a newbie and might not realize it. You'll hate his code deeply a few years down the road." - Sortie
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embryo

Re: Introduction of nop 'fixes' rep movsb

Post by embryo »

Combuster wrote:Instead of trolling and throwing a tantrum over being corrected, you can cite the relevant portion of the manual - if it exists.
Well, if Combuster gives up on finding relevant information I am glad to present it :)
Intel® 64 and IA-32 Architectures Software Developer’s Manual wrote:3.7.5.1 Specifying an Offset in 64-Bit Mode
The offset part of a memory address in 64-bit mode can be specified directly as a static value or through an address
computation made up of one or more of the following components:
• Displacement — An 8-bit, 16-bit, or 32-bit value.
• Base — The value in a 32-bit (or 64-bit if REX.W is set) general-purpose register.
• Index — The value in a 32-bit (or 64-bit if REX.W is set) general-purpose register.
• Scale factor —A value of 2, 4, or 8 that is multiplied by the index value.
The important part here is about Base and Index registers.
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Re: Introduction of nop 'fixes' rep movsb

Post by Icee »

embryo wrote:The important part here is about Base and Index registers.
The address size override prefix, 0x67, still works in 64-bit mode, allowing 16-bit bases and indexes.

EDIT: see table 1-3 in section 1.2.3 and table A-33 in appendix A in AMD Manual volume 3.
embryo

Re: Introduction of nop 'fixes' rep movsb

Post by embryo »

Icee wrote:cf. table 1-3 in section 1.2.3 and table A-33 in appendix A in AMD Manual volume 3.
Yet another hack, mentioned somewhere deep enough to be missed by most part of developers. Should we trust a yet another hack? Or is it better just to read it in simple words and use 32 or 64 bit registers?

But may be it is the question that Intel should answer.
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