Segmentation memory- question

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szarek
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Re: Segmentation memory- question

Post by szarek »

Brendan, thanks for your help :)
The CPU has 2 different "spaces"
1. Therefore, is it phisically placed in cpu's memory?
2. Is it cache memory?
Thanks in advance ;)
Peterbjornx
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Re: Segmentation memory- question

Post by Peterbjornx »

It is neither, IO space is address space mapped directly to peripheral registers, on a real 8086 an IO cycle would have a line asserted to signal that it was addressing IO and not memory, the IO device would then either latch the value on the bus or put its data on the bus depending on the kind of cycle(read,write)
azblue
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Re: Segmentation memory- question

Post by azblue »

Brendan wrote:
the segment's limit is only "byte granular" if the segment is 64 KiB or less (for larger segments you have "4 KiB granular");
Isn't it possible to have 1MB data segments? Not that that would be particularly useful, but the CPU does support that, doesn't it?
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Brendan
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Re: Segmentation memory- question

Post by Brendan »

Hi,
azblue wrote:
Brendan wrote:the segment's limit is only "byte granular" if the segment is 64 KiB or less (for larger segments you have "4 KiB granular");
Isn't it possible to have 1MB data segments? Not that that would be particularly useful, but the CPU does support that, doesn't it?
You're right - it's "byte granular" up to 1 MiB (and 4 KiB granularity for 1 MiB or larger segments). Basically, you can set the limit to 0x000FFFFF (1 MiB - 1 byte), but can't set it to 0x00100001 (1 MiB + 1 byte) and would have to use a limit of 0x00101000 (1 MiB + 4 KiB) instead.


Cheers,

Brendan
For all things; perfection is, and will always remain, impossible to achieve in practice. However; by striving for perfection we create things that are as perfect as practically possible. Let the pursuit of perfection be our guide.
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