does this PIT is correct?

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brighteningeyes
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does this PIT is correct?

Post by brighteningeyes »

hi
i've implemented a timer in my kernel, i think it doesn't work
because, it give's a stack fault
actually, i've searched for GDT and IDT to be corrected, but nothing gos crazy
this is the bochs output:

Code: Select all

i Bochs x86 Emulator 2.6.2
i   Built from SVN snapshot on May 26, 2013
i Compiled on May 26 2013 at 10:10:55
i System configuration
i   processors: 1 (cores=1, HT threads=1)
i   A20 line support: yes
i IPS is set to 4000000
i CPU configuration
i   SMP support: no
i   level: 6
i   APIC support: xapic
i   FPU support: yes
i   MMX support: yes
i   3dnow! support: no
i   SEP support: yes
i   SSE support: sse2
i   XSAVE support: no 
i   AES support: no
i   MOVBE support: no
i   ADX support: no
i   x86-64 support: yes
i   1G paging support: no
i   MWAIT support: yes
i   VMX support: 1
i Optimization configuration
i   RepeatSpeedups support: yes
i   Fast function calls: yes
i   Handlers Chaining speedups: yes
i Devices configuration
i   NE2000 support: yes
i   PCI support: yes, enabled=yes
i   SB16 support: yes
i   USB support: yes
i   VGA extension support: vbe cirrus voodoo
i allocated memory at 034F0020. after alignment, vector=034F1000
i 128.00MB
i mem block size = 0x00100000, blocks=128
i rom at 0xfffe0000/131072 ('C:\Program Files\Bochs/BIOS-bochs-latest')
i init_dev of 'pci' plugin device by virtual method
i i440FX PMC present at device 0, function 0
i init_dev of 'pci2isa' plugin device by virtual method
i PIIX3 PCI-to-ISA bridge present at device 1, function 0
i init_dev of 'cmos' plugin device by virtual method
i Using local time for initial clock
i Setting initial clock to: Fri Nov 15 08:23:49 2013 (time0=1384491229)
i init_dev of 'dma' plugin device by virtual method
i channel 4 used by cascade
i init_dev of 'pic' plugin device by virtual method
i init_dev of 'pit' plugin device by virtual method
i init_dev of 'floppy' plugin device by virtual method
i channel 2 used by Floppy Drive
i tried to open 'a.img' read/write: No such file or directory
i tried to open 'a.img' read only: No such file or directory
i tried to open 'b.img' read/write: No such file or directory
i tried to open 'b.img' read only: No such file or directory
i init_dev of 'vga' plugin device by virtual method
i Register memory access handlers: 0x0000000a0000 - 0x0000000bffff
i interval=200000
i Register memory access handlers: 0x0000e0000000 - 0x0000e0ffffff
i VBE Bochs Display Extension Enabled
i Desktop Window dimensions: 1024 x 768
i Number of Mouse Buttons = 3
i IME disabled
i rom at 0xc0000/41472 ('C:\Program Files\Bochs/VGABIOS-lgpl-latest')
i init_dev of 'acpi' plugin device by virtual method
i ACPI Controller present at device 1, function 3
i init_dev of 'ioapic' plugin device by virtual method
i initializing I/O APIC
i Register memory access handlers: 0x0000fec00000 - 0x0000fec00fff
i IOAPIC enabled (base address = 0xfec00000)
i init_dev of 'keyboard' plugin device by virtual method
i will paste characters every 400 keyboard ticks
i init_dev of 'harddrv' plugin device by virtual method
i HD on ata0-0: 'AmirOS.img', 'flat' mode
i hd_size: 2147475456
i ata0-0: using specified geometry: CHS=4161/16/63
i CD on ata0-1: 'AmirOS.iso'
i load cdrom with path=AmirOS.iso
i Opening image file as a cd
i Media present in CD-ROM drive
i Capacity is 704 sectors (1.38 MB)
i translation on ata0-0 set to 'large'
i Using boot sequence cdrom, none, none
i Floppy boot signature check is enabled
i init_dev of 'pci_ide' plugin device by virtual method
i PIIX3 PCI IDE controller present at device 1, function 1
i init_dev of 'unmapped' plugin device by virtual method
i init_dev of 'biosdev' plugin device by virtual method
i init_dev of 'speaker' plugin device by virtual method
i init_dev of 'extfpuirq' plugin device by virtual method
i init_dev of 'parallel' plugin device by virtual method
i parallel port 1 at 0x0378 irq 7
i init_dev of 'serial' plugin device by virtual method
i com1 at 0x03f8 irq 4
i init_dev of 'gameport' plugin device by virtual method
i init_dev of 'usb_uhci' plugin device by virtual method
i Experimental USB UHCI present at device 1, function 2
i USB UHCI initialized
i register state of 'pci' plugin device by virtual method
i register state of 'pci2isa' plugin device by virtual method
i register state of 'cmos' plugin device by virtual method
i register state of 'dma' plugin device by virtual method
i register state of 'pic' plugin device by virtual method
i register state of 'pit' plugin device by virtual method
i register state of 'floppy' plugin device by virtual method
i register state of 'vga' plugin device by virtual method
i register state of 'unmapped' plugin device by virtual method
i register state of 'biosdev' plugin device by virtual method
i register state of 'speaker' plugin device by virtual method
i register state of 'extfpuirq' plugin device by virtual method
i register state of 'parallel' plugin device by virtual method
i register state of 'serial' plugin device by virtual method
i register state of 'gameport' plugin device by virtual method
i register state of 'usb_uhci' plugin device by virtual method
i register state of 'acpi' plugin device by virtual method
i register state of 'ioapic' plugin device by virtual method
i register state of 'keyboard' plugin device by virtual method
i register state of 'harddrv' plugin device by virtual method
i register state of 'pci_ide' plugin device by virtual method
i bx_pc_system_c::Reset(HARDWARE) called
i cpu hardware reset
i allocate APIC id=0 (MMIO enabled) to 0x0000fee00000
i CPUID[0x00000000]: 00000005 756e6547 6c65746e 49656e69
i CPUID[0x00000001]: 00000633 00010800 00002028 1fcbfbff
i CPUID[0x00000002]: 00410601 00000000 00000000 00000000
i CPUID[0x00000003]: 00000000 00000000 00000000 00000000
i CPUID[0x00000004]: 00000000 00000000 00000000 00000000
i CPUID[0x00000005]: 00000040 00000040 00000003 00000020
i CPUID[0x80000000]: 80000008 00000000 00000000 00000000
i CPUID[0x80000001]: 00000000 00000000 00000101 2a100000
i CPUID[0x80000002]: 20202020 20202020 20202020 6e492020
i CPUID[0x80000003]: 286c6574 50202952 69746e65 52286d75
i CPUID[0x80000004]: 20342029 20555043 20202020 00202020
i CPUID[0x80000005]: 01ff01ff 01ff01ff 40020140 40020140
i CPUID[0x80000006]: 00000000 42004200 02008140 00000000
i CPUID[0x80000007]: 00000000 00000000 00000000 00000000
i CPUID[0x80000008]: 00003028 00000000 00000000 00000000
i reset of 'pci' plugin device by virtual method
i reset of 'pci2isa' plugin device by virtual method
i reset of 'cmos' plugin device by virtual method
i reset of 'dma' plugin device by virtual method
i reset of 'pic' plugin device by virtual method
i reset of 'pit' plugin device by virtual method
i reset of 'floppy' plugin device by virtual method
i reset of 'vga' plugin device by virtual method
i reset of 'acpi' plugin device by virtual method
i reset of 'ioapic' plugin device by virtual method
i reset of 'keyboard' plugin device by virtual method
i reset of 'harddrv' plugin device by virtual method
i reset of 'pci_ide' plugin device by virtual method
i reset of 'unmapped' plugin device by virtual method
i reset of 'biosdev' plugin device by virtual method
i reset of 'speaker' plugin device by virtual method
i Using system beep for output
i reset of 'extfpuirq' plugin device by virtual method
i reset of 'parallel' plugin device by virtual method
i reset of 'serial' plugin device by virtual method
i reset of 'gameport' plugin device by virtual method
i reset of 'usb_uhci' plugin device by virtual method
i allocate_block: block=0x0 used 0x1 of 0x80
i $Revision: 11545 $ $Date: 2012-11-11 09:11:17 +0100 (So, 11. Nov 2012) $
i reset-disable command received
i Starting rombios32
i Shutdown flag 0
i ram_size=0x08000000
i ram_end=128MB
i dimension update x=720 y=400 fontheight=16 fontwidth=9 bpp=8
i Found 1 cpu(s)
i bios_table_addr: 0x000fa448 end=0x000fcc00
i i440FX PMC write to PAM register 59 (TLB Flush)
i PCI IRQ routing: PIRQA# set to 0x0b
i PCI IRQ routing: PIRQB# set to 0x09
i PCI IRQ routing: PIRQC# set to 0x0b
i PCI IRQ routing: PIRQD# set to 0x09
i write: ELCR2 = 0x0a
i PIIX3/PIIX4 init: elcr=00 0a
i PCI: bus=0 devfn=0x00: vendor_id=0x8086 device_id=0x1237 class=0x0600
i PCI: bus=0 devfn=0x08: vendor_id=0x8086 device_id=0x7000 class=0x0601
i PCI: bus=0 devfn=0x09: vendor_id=0x8086 device_id=0x7010 class=0x0101
i new BM-DMA address: 0xc000
i region 4: 0x0000c000
i PCI: bus=0 devfn=0x0a: vendor_id=0x8086 device_id=0x7020 class=0x0c03
i new base address: 0xc020
i region 4: 0x0000c020
i new irq line = 9
i PCI: bus=0 devfn=0x0b: vendor_id=0x8086 device_id=0x7113 class=0x0680
i new irq line = 11
i new irq line = 9
i new PM base address: 0xb000
i new SM base address: 0xb100
i setting SMRAM control register to 0x4a
i Enter to System Management Mode
i enter_system_management_mode: temporary disable VMX while in SMM mode
i RSM: Resuming from System Management Mode
i setting SMRAM control register to 0x0a
i MP table addr=0x000fa520 MPC table addr=0x000fa450 size=0xc8
i SMBIOS table addr=0x000fa530
i allocate_block: block=0x7f used 0x2 of 0x80
i ACPI tables: RSDP addr=0x000fa650 ACPI DATA addr=0x07ff0000 size=0xf72
i Firmware waking vector 0x7ff00cc
i i440FX PMC write to PAM register 59 (TLB Flush)
i bios_table_cur_addr: 0x000fa674
i VGABios $Id: vgabios.c,v 1.75 2011/10/15 14:07:21 vruppert Exp $ i VBE known Display Interface b0c0
i VBE known Display Interface b0c5
i VBE Bios $Id: vbe.c,v 1.64 2011/07/19 18:25:05 vruppert Exp $
i ata0-0: PCHS=4161/16/63 translation=large LCHS=520/128/63
i Booting from 07c0:0000
e write_virtual_word_32(): segment limit violation
e write_virtual_word_32(): segment limit violation
e write_virtual_word_32(): segment limit violation
i CPU is in real mode (active)
i CS.mode = 16 bit
i SS.mode = 16 bit
i EFER   = 0x00000000
i | EAX=0000e0fc  EBX=00000003  ECX=00000000  EDX=000000e0
i | ESP=00000001  EBP=00000000  ESI=00005fec  EDI=00000001
i | IOPL=0 id vip vif ac vm RF nt of df IF tf sf zf AF pf CF
i | SEG sltr(index|ti|rpl)     base    limit G D
i |  CS:0820( 0004| 0|  0) 00008200 0000ffff 0 0
i |  DS:0000( 0005| 0|  0) 00000000 0000ffff 0 0
i |  SS:0000( 0005| 0|  0) 00000000 0000ffff 0 0
i |  ES:0000( 0005| 0|  0) 00000000 0000ffff 0 0
i |  FS:0000( 0005| 0|  0) 00000000 0000ffff 0 0
i |  GS:0000( 0005| 0|  0) 00000000 0000ffff 0 0
i | EIP=0000750e (0000750e)
i | CR0=0x60000010 CR2=0x00000000
i | CR3=0x00000000 CR4=0x00000000
i 0x000000000000750e>> push ax : 50
p >>PANIC<< exception(): 3rd (12) exception with no resolution
e WARNING: Any simulation after this point is completely bogus !
this is my GDT.c:

Code: Select all

#include <types.h>
#include "gdt.h"

gdt gdt_desc[5];
gdt_ptr gdt_desc_ptr;

/*
*initialize the GDT
*/
void gdt_init()
{
gdt_desc_ptr.limit=(sizeof(gdt)*5);
gdt_desc_ptr.base=(uint)&gdt_desc_ptr;
gdt_set_gate(0, 0, 0, 0, 0);
gdt_set_gate(1, 0, 0xFFFFFFFF, 0x9A, 0xCF);
gdt_set_gate(2, 0, 0xFFFFFFFF, 0x92, 0xCF);
gdt_set_gate(3, 0, 0xFFFFFFFF, 0xFA, 0xCF);
gdt_set_gate(4, 0, 0xFFFFFFFF, 0xF2, 0xCF);
gdt_setup();
}

/*
*this function set's the GDT
*/
void gdt_set_gate(uint number, uint base, uint limit, uint access, uint granularity)
{
gdt_desc[number].low_base=(base &0xFFFF);
gdt_desc[number].middle_base=(base >> 16) & 0xFF;
gdt_desc[number].high_base=(base >> 24) & 0xFF;
gdt_desc[number].low_limit=(limit &0xFFFF);
gdt_desc[number].granularity=(limit>>16) &0x0F;
gdt_desc[number].granularity |= granularity & 0xF0;
gdt_desc[number].access      = access;
}
this is GDT.h:

Code: Select all

#ifndef _AMIROS_GDT_H_
#define _AMIROS_GDT_H_

/*
*GDT functions
*/
extern void gdt_setup();
void gdt_init();
void gdt_set_gate(uint, uint, uint, uint, uint);

/*
*the GDT (Global Descripter table) structure
*/
struct gdt
{
uint low_limit;
uint low_base;
uint middle_base;
uint high_base;
uint access;
uint granularity;
} __attribute__((packed));
typedef struct gdt gdt;

/*
*the GDT pointer
*/
struct gdt_ptr
{
uint limit;
uint base;
} __attribute__((packed));
typedef struct gdt_ptr gdt_ptr;

#endif
this is idt.c:

Code: Select all

#include <types.h>
#include <memory.h>
#include "io.h"
#include "idt.h"

idt idt_desc[256];
idt_ptr idt_desc_ptr;

/*
*initialize the IDT
*/
void idt_init()
{
idt_desc_ptr.limit=sizeof(idt);
idt_desc_ptr.base=(uint)&idt_desc;
memset(&idt_desc, 0, sizeof(idt)*256);
    outb(0x20, 0x11);
    outb(0xA0, 0x11);
    outb(0x21, 0x20);
    outb(0xA1, 0x28);
    outb(0x21, 0x04);
    outb(0xA1, 0x02);
    outb(0x21, 0x01);
    outb(0xA1, 0x01);
    outb(0x21, 0x0);
    outb(0xA1, 0x0);
    idt_set_gate( 0, (uint)isr0 , 0x08, 0x8E);
    idt_set_gate( 1, (uint)isr1 , 0x08, 0x8E);
    idt_set_gate( 2, (uint)isr2 , 0x08, 0x8E);
    idt_set_gate( 3, (uint)isr3 , 0x08, 0x8E);
    idt_set_gate( 4, (uint)isr4 , 0x08, 0x8E);
    idt_set_gate( 5, (uint)isr5 , 0x08, 0x8E);
    idt_set_gate( 6, (uint)isr6 , 0x08, 0x8E);
    idt_set_gate( 7, (uint)isr7 , 0x08, 0x8E);
    idt_set_gate( 8, (uint)isr8 , 0x08, 0x8E);
    idt_set_gate( 9, (uint)isr9 , 0x08, 0x8E);
    idt_set_gate(10, (uint)isr10, 0x08, 0x8E);
    idt_set_gate(11, (uint)isr11, 0x08, 0x8E);
    idt_set_gate(12, (uint)isr12, 0x08, 0x8E);
    idt_set_gate(13, (uint)isr13, 0x08, 0x8E);
    idt_set_gate(14, (uint)isr14, 0x08, 0x8E);
    idt_set_gate(15, (uint)isr15, 0x08, 0x8E);
    idt_set_gate(16, (uint)isr16, 0x08, 0x8E);
    idt_set_gate(17, (uint)isr17, 0x08, 0x8E);
    idt_set_gate(18, (uint)isr18, 0x08, 0x8E);
    idt_set_gate(19, (uint)isr19, 0x08, 0x8E);
    idt_set_gate(20, (uint)isr20, 0x08, 0x8E);
    idt_set_gate(21, (uint)isr21, 0x08, 0x8E);
    idt_set_gate(22, (uint)isr22, 0x08, 0x8E);
    idt_set_gate(23, (uint)isr23, 0x08, 0x8E);
    idt_set_gate(24, (uint)isr24, 0x08, 0x8E);
    idt_set_gate(25, (uint)isr25, 0x08, 0x8E);
    idt_set_gate(26, (uint)isr26, 0x08, 0x8E);
    idt_set_gate(27, (uint)isr27, 0x08, 0x8E);
    idt_set_gate(28, (uint)isr28, 0x08, 0x8E);
    idt_set_gate(29, (uint)isr29, 0x08, 0x8E);
    idt_set_gate(30, (uint)isr30, 0x08, 0x8E);
    idt_set_gate(31, (uint)isr31, 0x08, 0x8E);
    idt_set_gate(32, (uint)irq0, 0x08, 0x8E);
    idt_set_gate(33, (uint)irq1, 0x08, 0x8E);
    idt_set_gate(34, (uint)irq2, 0x08, 0x8E);
    idt_set_gate(35, (uint)irq3, 0x08, 0x8E);
    idt_set_gate(36, (uint)irq4, 0x08, 0x8E);
    idt_set_gate(37, (uint)irq5, 0x08, 0x8E);
    idt_set_gate(38, (uint)irq6, 0x08, 0x8E);
    idt_set_gate(39, (uint)irq7, 0x08, 0x8E);
    idt_set_gate(40, (uint)irq8, 0x08, 0x8E);
    idt_set_gate(41, (uint)irq9, 0x08, 0x8E);
    idt_set_gate(42, (uint)irq10, 0x08, 0x8E);
    idt_set_gate(43, (uint)irq11, 0x08, 0x8E);
    idt_set_gate(44, (uint)irq12, 0x08, 0x8E);
    idt_set_gate(45, (uint)irq13, 0x08, 0x8E);
    idt_set_gate(46, (uint)irq14, 0x08, 0x8E);
    idt_set_gate(47, (uint)irq15, 0x08, 0x8E);
idt_setup();
}

/*
*this function set's the IDT
*/
void idt_set_gate(uint number, uint base, uint selector, uint flags)
{
idt_desc[number].low_base=base & 0xFFFF;
idt_desc[number].high_base=(base>>16)&0xFFFF;
idt_desc[number].selector=selector;
idt_desc[number].always0=0;
idt_desc[number].flags=flags;
}
this is idt.h:

Code: Select all

#ifndef _AMIROS_IDT_
#define _AMIROS_IDT_

/*
*IDT functions
*/
extern void idt_setup();
void idt_init();
void idt_set_gate(uint, uint, uint, uint);

/*
*the IDT (Interrupt Descripter Table)  structure
*/
struct idt
{
uint low_base;
uint high_base;
uint selector;
uint flags;
uint always0;
} __attribute__((packed));
typedef struct idt idt;

struct idt_ptr
{
uint limit;
uint base;
} __attribute__((packed));

typedef struct idt_ptr idt_ptr;

extern void isr0();
extern void isr1();
extern void isr2();
extern void isr3();
extern void isr4();
extern void isr5();
extern void isr6();
extern void isr7();
extern void isr8();
extern void isr9();
extern void isr10();
extern void isr11();
extern void isr12();
extern void isr13();
extern void isr14();
extern void isr15();
extern void isr16();
extern void isr17();
extern void isr18();
extern void isr19();
extern void isr20();
extern void isr21();
extern void isr22();
extern void isr23();
extern void isr24();
extern void isr25();
extern void isr26();
extern void isr27();
extern void isr28();
extern void isr29();
extern void isr30();
extern void isr31();
extern void irq0();
extern void irq1();
extern void irq2();
extern void irq3();
extern void irq4();
extern void irq5();
extern void irq6();
extern void irq7();
extern void irq8();
extern void irq9();
extern void irq10();
extern void irq11();
extern void irq12();
extern void irq13();
extern void irq14();
extern void irq15();

#endif
this is irq.c:

Code: Select all

#include <types.h>
#include "io.h"
#include "isr.h"
#include "irq.h"

pointer irq_handlers[16]=
{
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};

void irq_register_handler(irq_event *event, uint n)
{
irq_handlers[n]=&event;
}

void irq_unregister_handler(uint n)
{
irq_handlers[n]=0;
}

void irq_handler(registers r)
{
irq_event event;
event=irq_handlers[r.errnum-32];
if(event)
{
event(r);
if(r.errnum>=40)
{
outb(0xA0, 0X20);
}
outb(0X20, 0X20);
}
}
this is irq.h:

Code: Select all

#ifndef _AMIROS_IRQ_
#define _AMIROS_IRQ_

typedef void (*irq_event)(struct registers);

void irq_register_event(irq_event*, uint);
void irq_unregister_event(uint);
void irq_handler(registers);

#endif
this is isr.c:

Code: Select all

#include <types.h>
#include <screen.h>
#include "isr.h"

const uchar* expmsg[32]=
{
"divided by 0!",
"debug exception acurd!",
"nonmaskable interrupt exception acurd!",
"breakpoint exception acurd!",
"into detected overflow exception!",
"out of bounds!",
"invalid opcode!",
"no coprocessor available!",
"double fault!",
"coprocessor segment overrun!",
"Bad TSS!",
"segment not available!",
"stack fault!",
"genral protection fault: no permition!",
"page fault exception!",
"unknown interrupt!",
"coprocessor fault!",
"alignment check!",
"machine check exception!",
"error 19: reserved by intel!",
"error 20: reserved by intel!",
"error 21: reserved by intel!",
"error 22: reserved by intel!",
"error 23: reserved by intel!",
"error 24: reserved by intel!",
"error 25: reserved by intel!",
"error 26: reserved by intel!",
"error 27: reserved by intel!",
"error 28: reserved by intel!",
"error 29: reserved by intel!",
"error 30: reserved by intel!",
"error 31: reserved by intel!"
};

isr_event isr[32];

void isr_handler(registers r)
{
isr_event t=isr[r.errnum];
t(r);
if(r.errnum<32)
{
print((pointer)expmsg[r.errnum], "halting!");
for(;;);
}
}

void isr_register_event(isr_event *event, uint n)
{
isr[n]=&event;
}

void isr_unregister_event(uint n)
{
isr[n]=0;
}
this is isr.h:

Code: Select all

#ifndef _AMIROS_ISR_
#define _AMIROS_ISR_

typedef struct registers {
uint eax;
uint ebx;
uint ecx;
uint edx;
uint eip;
uint eflags;
uint esp;
uint ebp;
uint ss;
uint useresp;
uint es;
uint fs;
uint gs;
uint ds;
uint cs;
uint eci;
uint errnum;
uint errcode;
}registers;

typedef void (*isr_event)(registers);

void isr_handler(registers r);
void isr_register_event(isr_event*, uint);
void isr_unregister_event(uint);

#endif
this is timer.c:

Code: Select all

#include <types.h>
#include "isr.h"
#include "irq.h"
#include "io.h"
#include "timer.h"

uint timer_tics;

void timer(registers r)
{
int hz=50;
int divisor=1193180/hz;
outb(0x43, 0x36);
outb(0x40, divisor&0xFF);
outb(0x40, divisor>>8);
do
{
timer_tics++;
}
while(timer_tics%100==0);
}

void timer_init()
{
irq_register_handler(timer, 0);
}

void wait(uint seconds)
{
seconds=seconds+timer_tics;
for(;seconds>timer_tics;--seconds)
{
for(;;);
}
}
this is timer.h:

Code: Select all

#ifndef _AMIROS_TIMER_HANDLER_
#define _AMIROS_TIMER_HANDLER_

#include <timer.h>

void timer_init();
void timer (registers);

#endif
this is asm.s:

Code: Select all

[bits 32]

global Boot
global gdt_setup
global idt_setup
global inb
global outb
global isr0
global isr1
global isr2
global isr3
global isr4
global isr5
global isr6
global isr7
global isr8
global isr9
global isr10
global isr11
global isr12
global isr13
global isr14
global isr15
global isr16
global isr17
global isr18
global isr19
global isr20
global isr21
global isr22
global isr23
global isr24
global isr25
global isr26
global isr27
global isr28
global isr29
global isr30
global isr31
global isr_stub
global irq0
global irq1
global irq2
global irq3
global irq4
global irq5
global irq6
global irq7
global irq8
global irq9
global irq10
global irq11
global irq12
global irq13
global irq14
global irq15
global irq_stub
extern LoadKernel
extern gdt_desc_ptr
extern idt_desc_ptr
extern isr_handler
extern irq_handler

;do not edit here!:this section is only for grub
section .boot
align 0x4
MODULEALIGN equ 1<<0
MEMINFO equ 1<<1
FLAGS equ MODULEALIGN|MEMINFO
MAGIC equ 0x1BADB002
CHECKSUM equ -(MAGIC+FLAGS)

boothdr:
dd MAGIC
dd FLAGS
dd CHECKSUM

;now you can modify
Boot:
push ebx ;takes the multiboot structure
call LoadKernel ;load are Operating System kernel
jmp $
section .text
gdt_setup:
LGDT[gdt_desc_ptr]
mov eax, 0x10
mov ds, eax
mov es, eax
mov fs, eax
mov gs, eax
mov ss, eax
jmp 0x08:.flush

.flush:
ret

idt_setup:
LIDT[idt_desc_ptr]
ret

outb:
    ; Get arguments
    mov al, [esp + 8] ; value
    mov dx, [esp + 4] ; addr

    ; Write out
    out dx, al
    ret

inb:
    ; Get argument
    mov dx, [esp + 4]

    ; Read in
    in al, dx
ret

halt:
cli
hlt
ret

disable_idt:
cli
ret

enable_idt:
sti
ret

isr0:
cli
push byte 0
push byte 0
jmp isr_stub

isr1:
cli
push byte 0
push byte 1
jmp isr_stub

isr2:
cli
push byte 0
push byte 2
jmp isr_stub

isr3:
cli
push byte 0
push byte 3
jmp isr_stub

isr4:
cli
push byte 0
push byte 4
jmp isr_stub

isr5:
cli
push byte 0
push byte 5
jmp isr_stub

isr6:
cli
push byte 0
push byte 6
jmp isr_stub

isr7:
cli
push byte 0
push byte 7
jmp isr_stub

isr8:
cli
push byte 8
jmp isr_stub

isr9:
cli
push byte 0
push byte 9
jmp isr_stub

isr10:
cli
push byte 10
jmp isr_stub

isr11:
cli
push byte 11
jmp isr_stub

isr12:
cli
push byte 12
jmp isr_stub

isr13:
cli
push byte 13
jmp isr_stub

isr14:
cli
push byte 14
jmp isr_stub

isr15:
cli
push byte 0
push byte 15
jmp isr_stub

isr16:
cli
push byte 0
push byte 16
jmp isr_stub

isr17:
cli
push byte 0
push byte 17
jmp isr_stub

isr18:
cli
push byte 0
push byte 18
jmp isr_stub

isr19:
cli
push byte 0
push byte 19
jmp isr_stub

isr20:
cli
push byte 0
push byte 20
jmp isr_stub

isr21:
cli
push byte 0
push byte 21
jmp isr_stub

isr22:
cli
push byte 0
push byte 22
jmp isr_stub

isr23:
cli
push byte 0
push byte 23
jmp isr_stub

isr24:
cli
push byte 0
push byte 24
jmp isr_stub

isr25:
cli
push byte 0
push byte 25
jmp isr_stub

isr26:
cli
push byte 0
push byte 26
jmp isr_stub

isr27:
cli
push byte 0
push byte 27
jmp isr_stub

isr28:
cli
push byte 0
push byte 28
jmp isr_stub

isr29:
cli
push byte 0
push byte 29
jmp isr_stub

isr30:
cli
push byte 0
push byte 30
jmp isr_stub

isr31:
cli
push byte 0
push byte 31
jmp isr_stub

irq0:
cli
push byte 0
push byte 32
jmp irq_stub

irq1:
cli
push byte 0
push byte 33
jmp irq_stub

irq2:
cli
push byte 0
push byte 34
jmp irq_stub

irq3:
cli
push byte 0
push byte 35
jmp irq_stub

irq4:
cli
push byte 0
push byte 36
jmp irq_stub

irq5:
cli
push byte 0
push byte 37
jmp irq_stub

irq6:
cli
push byte 0
push byte 38
jmp irq_stub

irq7:
cli
push byte 0
push byte 39
jmp irq_stub

irq8:
cli
push byte 0
push byte 40
jmp irq_stub

irq9:
cli
push byte 0
push byte 41
jmp irq_stub

irq10:
cli
push byte 0
push byte 42
jmp irq_stub

irq11:
cli
push byte 0
push byte 43
jmp irq_stub

irq12:
cli
push byte 0
push byte 44
jmp irq_stub

irq13:
cli
push byte 0
push byte 45
jmp irq_stub

irq14:
cli
push byte 0
push byte 46
jmp irq_stub

irq15:
cli
push byte 0
push byte 47
jmp irq_stub

isr_stub:
pusha
push ds
push es
push fs
push gs
mov eax, 0x10
mov ds, eax
mov es, eax
mov fs, eax
mov gs, eax
mov eax, esp
push eax
call isr_handler
pop eax
pop gs
pop fs
pop es
pop ds
popa
add esp, 8
iret

irq_stub:
pusha
push ds
push es
push fs
push gs
mov eax, 0x10
mov gs, eax
mov fs, eax
mov es, eax
mov ds, eax
mov eax, esp
push eax
call irq_handler
pop eax
pop gs
pop fs
pop ds
pop es
popa
add esp, 8
iret

section .bss
resb 8192
please tell me, where is the problem, i want to fix it!
thanks in advance
testing the operating system is very hard when your eyes can't see well
like me and many others
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brighteningeyes
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Posts: 45
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Re: does this PIT is correct?

Post by brighteningeyes »

now i know that the problem is from grub
the grub cdboot.img can't be loaded
the problem is from mkisofs
thank you for don't reply to this topic
testing the operating system is very hard when your eyes can't see well
like me and many others
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Combuster
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Posts: 9301
Joined: Wed Oct 18, 2006 3:45 am
Libera.chat IRC: [com]buster
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Re: does this PIT is correct?

Post by Combuster »

brighteningeyes wrote:thank you for don't[sic] reply to this topic
I'm going to disappoint you.

What were you thinking to achieve by posting many pages of code, and a paragraph that contains more syntax errors than there are words in the actual description "it doesn't work"?
"Certainly avoid yourself. He is a newbie and might not realize it. You'll hate his code deeply a few years down the road." - Sortie
[ My OS ] [ VDisk/SFS ]
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