IDT return problem from isr

kemosparc · Post by **kemosparc** » Mon Nov 04, 2013 6:21 pm

Hi,

I am writing a 64 bit kernel.

I am in the phase of writing the ISRs and I was able to load the IDT to the code.

The interrupt service routine gets fired successfully and execute the isr handler which is written in C code.

The problem is that when the isr tries to return it failes and the qemu keeps on restarting forever.

My code is divided in to

Assembly code:

Code: Select all

[BITS 64]
%macro pushAll 0
      push   rax
      push   rcx
      push   rdx
      push   rbx
      push   rbp
      push   rsi
      push   rdi
%endmacro

%macro popAll 0
      pop      rdi
      pop      rsi
      pop      rbp
      pop      rbx
      pop      rdx
      pop      rcx
      pop      rax
%endmacro

global idtInit
extern idtP
idtInit:
   lidt [idtP]
   ret

;/*
; * Interrupt Handler
; */
extern isrHandler

isrCommon:
    pushAll
    mov      ax, ds
    push   rax
    mov      rax, rsp
    push   rax

    mov      ax, 0x10
    mov      ds, ax
    mov      es, ax
    mov      fs, ax
    mov      gs, ax

    call   isrHandler

    pop      rbx
    mov      rsp,rbx
    pop      rbx
    mov      ds, bx
    mov      es, bx
    mov      fs, bx
    mov      gs, bx
    popAll

    add      rsp, 8
    sti
    iretq

%macro ISR_NOERRCODE 1
  [GLOBAL isr%1]
  isr%1:
    cli
    push byte 0
    push byte %1
    jmp isrCommon
%endmacro

%macro ISR_ERRCODE 1
  [GLOBAL isr%1]
  isr%1:
    cli
    push byte %1
    jmp isrCommon
%endmacro

ISR_NOERRCODE 0
ISR_NOERRCODE 1
ISR_NOERRCODE 2
ISR_NOERRCODE 3
ISR_NOERRCODE 4
ISR_NOERRCODE 5
ISR_NOERRCODE 6
ISR_NOERRCODE 7
ISR_ERRCODE   8
ISR_NOERRCODE 9
ISR_ERRCODE   10
ISR_ERRCODE   11
ISR_ERRCODE   12
ISR_ERRCODE   13
ISR_ERRCODE   14
ISR_NOERRCODE 15
ISR_NOERRCODE 16
ISR_NOERRCODE 17
ISR_NOERRCODE 18
ISR_NOERRCODE 19
ISR_NOERRCODE 20
ISR_NOERRCODE 21
ISR_NOERRCODE 22
ISR_NOERRCODE 23
ISR_NOERRCODE 24
ISR_NOERRCODE 25
ISR_NOERRCODE 26
ISR_NOERRCODE 27
ISR_NOERRCODE 28
ISR_NOERRCODE 29
ISR_NOERRCODE 30
ISR_NOERRCODE 31

C Code:

Code: Select all

#define IDT_SIZE    256
typedef struct {
   uint16_t   baseLow;
   uint16_t   selector;
   uint8_t   reservedIst;
   uint8_t   flags;
   uint16_t   baseMid;
   uint32_t   baseHigh;
   uint32_t   reserved;
} __attribute__((packed)) idtEntry;

/*
* Interrupt Descriptor Pointer
*/

typedef struct {
   uint16_t   limit;
   uint64_t   base;
} __attribute__((packed)) idtPointer;

/*
* Pushed Registers for ISR's
*/
typedef struct {
    uint64_t ds;
    uint64_t rdi, rsi, rbp, rsp, rbx, rdx, rcx, rax;
    uint64_t intNo, errCode;
    uint64_t rip, cs, eflags, useresp, ss;
} registers;

/*
* Prototypes
*/
void idtStart(void);
void idtSet(uint8_t, uint64_t, uint16_t, uint8_t);

#if defined(__cplusplus)
extern "C" /* Use C linkage for kernel_main. */
#else
extern
#endif
void isrHandler(registers);

#if defined(__cplusplus)
extern "C" /* Use C linkage for kernel_main. */
#else
extern
#endif
void idtInit();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr0();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr1();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr2();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr3();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr4();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr5();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr6();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr7();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr8();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr9();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr10();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr11();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr12();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr13();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr14();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr15();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr16();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr17();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr18();
#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr19();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr20();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr21();


#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr22();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr23();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr24();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr25();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr26();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr27();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr28();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr29();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr30();

#if defined(__cplusplus)
extern "C"
#else
extern
#endif
void isr31();


/* Setup Table and Pointer */
idtEntry idt[IDT_SIZE];
idtPointer idtP;

void idtStart(void) {
   /* Set IDT Pointer */
   idtP.limit = (sizeof(idtEntry) * IDT_SIZE) - 1;
   idtP.base = (uint64_t)&idt;
   /* Clear Memory for IDT's */
   memset((uint8_t *)&idt, 0, sizeof(idtEntry) * IDT_SIZE);


   /* Set IDT Gates */
   idtSet(0, (uint64_t)isr0, 0x08, 0x8E);
   idtSet(1, (uint64_t)isr1, 0x08, 0x8E);
   idtSet(2, (uint64_t)isr2, 0x08, 0x8E);
   idtSet(3, (uint64_t)isr3, 0x08, 0x8E);
   idtSet(4, (uint64_t)isr4, 0x08, 0x8E);
   idtSet(5, (uint64_t)isr5, 0x08, 0x8E);
   idtSet(6, (uint64_t)isr6, 0x08, 0x8E);
   idtSet(7, (uint64_t)isr7, 0x08, 0x8E);
   idtSet(8, (uint64_t)isr8, 0x08, 0x8E);
   idtSet(9, (uint64_t)isr9, 0x08, 0x8E);
   idtSet(10, (uint64_t)isr10, 0x08, 0x8E);
   idtSet(11, (uint64_t)isr11, 0x08, 0x8E);
   idtSet(12, (uint64_t)isr12, 0x08, 0x8E);
   idtSet(13, (uint64_t)isr13, 0x08, 0x8E);
   idtSet(14, (uint64_t)isr14, 0x08, 0x8E);
   idtSet(15, (uint64_t)isr15, 0x08, 0x8E);
   idtSet(16, (uint64_t)isr16, 0x08, 0x8E);
   idtSet(17, (uint64_t)isr17, 0x08, 0x8E);
   idtSet(18, (uint64_t)isr18, 0x08, 0x8E);
   idtSet(19, (uint64_t)isr19, 0x08, 0x8E);
   idtSet(20, (uint64_t)isr20, 0x08, 0x8E);
   idtSet(21, (uint64_t)isr21, 0x08, 0x8E);
   idtSet(22, (uint64_t)isr22, 0x08, 0x8E);
   idtSet(23, (uint64_t)isr23, 0x08, 0x8E);
   idtSet(24, (uint64_t)isr24, 0x08, 0x8E);
   idtSet(25, (uint64_t)isr25, 0x08, 0x8E);
   idtSet(26, (uint64_t)isr26, 0x08, 0x8E);
   idtSet(27, (uint64_t)isr27, 0x08, 0x8E);
   idtSet(28, (uint64_t)isr28, 0x08, 0x8E);
   idtSet(29, (uint64_t)isr29, 0x08, 0x8E);
   idtSet(30, (uint64_t)isr30, 0x08, 0x8E);
   idtSet(31, (uint64_t)isr31, 0x08, 0x8E);

   /* Load IDT Table */
   idtInit();
}

void idtSet(uint8_t number, uint64_t base, uint16_t selector, uint8_t flags) {
   /* Set Base Address */
   idt[number].baseLow = base & 0xFFFF;
   idt[number].baseMid = (base >> 16) & 0xFFFF;
   idt[number].baseHigh = (base >> 32) & 0xFFFFFFFF;

   /* Set Selector */
   idt[number].selector = selector;
   idt[number].flags = flags;

   /* Set Reserved Areas to Zero */
   idt[number].reservedIst = 0;
   idt[number].reserved = 0;
}



#if defined(__cplusplus)
extern "C" /* Use C linkage for kernel_main. */
#endif


void isrHandler(registers regs) {
    Video video;
    video.setPosition(10,10);
    video.putString("interrupt: ",COLOR_BLUE,COLOR_WHITE);
    video.putDecimal(regs.intNo,COLOR_BLUE,COLOR_WHITE);
    video.putString("\n",COLOR_BLUE,COLOR_WHITE);
}

When I insert a hlt just before the iretq at the end of the isrCommon routine the qemu halts with no problems but ofcourse the execution is suspended and never returns, but it shows that the problem is in the return address.

If anyone has went through this before or know the solution to my problem, I appreciate sharing it with me.

Thanks a lot
karim.

Rudster816 · Post by **Rudster816** » Mon Nov 04, 2013 7:22 pm

I see three problems.

1. You're not saving all of the registers with your pushAll\popAll macros. You're forgetting about registers R8-R15 so even if your IRETQ worked properly you will have probably trashed some of these registers in your ISR.

2.

Code: Select all

add      rsp, 8

I believe you're trying to pop the error code off the stack here, but not all exceptions generate error codes. If there isn't an error code on the stack you're popping off the value of RIP at the time of the interrupt. Then when you execute the IRETQ the CPU is going to generate an exception (probably when it tries to load garbage into the CS\SS registers from the stack) which executes your double fault handler which faults again and you triple fault .

3. This isn't necessarily a problem, but it could end up being one. Before you do the IRETQ you re-enable interrupts, which is probably a bad idea. If you're executing something in kernel land where you need interrupts to stay disabled and you generate an exception you wish to recover from, you could end up servicing a hardware interrupt after you handle the exception. The IRETQ instruction will automatically restore RFLAGs for you so it will automatically re enable interrupts for you if they were already enabled.

kemosparc · Post by **kemosparc** » Tue Nov 05, 2013 3:39 am

Hi,

I did as you suggested, and I even went to the extreme of emptying my isrCommon so it does noting but iretq

Code: Select all

isrCommon:
sti
iretq

Still I get the same behavior. I tried with sti and without and still the same behavior. Also I tried with "add rsp,8" and without.

I read the section related to the interrupts AMD Architecture Programmers Manual and I don't see anything wrong with my code.

Anyways, if anyone has any thoughts please let me know.

Thanks
Karim

jnc100 · Post by **jnc100** » Tue Nov 05, 2013 4:44 am

As above you do not need the sti instruction - iret will restore the saved RFLAGS from the stack. In addition, as you are using interrupt gates you do not need the cli at the beginning as IF is automatically cleared at the start of the interrupt.

As to you problem with it hanging, its still probably a stack alignment issue. Your ISR_NOERRCODE/ISR_ERRCODE macros ensure that the stack state is <saved state><error code or 0><interrupt number> from which you immediately try a return. You need to add 16 to rsp first before trying the iret. In other words, try the following:

Code: Select all

isrCommon:
add rsp, 16
iretq

and if that doesn't hang, start adding more into it as required. You need to save rax, rcx, rdx, rdi, rsi, r8-r11 prior to calling any C function, and restore them (in the opposite order) afterwards. Furthermore, ensure that your compiler is using the correct switches (http://wiki.osdev.org/Creating_a_64-bit ... #Compiling).

Regards,
John.

kemosparc · Post by **kemosparc** » Tue Nov 05, 2013 8:13 am

Still does not work, I did everything recommended

Anything else I should look at?

One weird thing is that I trigger the interrupt through the following code:

Code: Select all

asm volatile ("int 0x3");

When I put a hlt before the iretq, the execution reaches my generic routine which prints the value of the interrupt number regs.intNo (you can look at my regsiters struct in my initial post). I expect that the value that should be printed is "3" but it prints a random large number that keeps on changing as the qemu reboots after the fault.

Here also my ISR generic handler:

Code: Select all

void isrHandler(registers regs) {
    Video video;
    video.setPosition(10,10);
    video.putString("interrupt: ",COLOR_BLUE,COLOR_WHITE);
    video.putDecimal(regs.intNo,COLOR_BLUE,COLOR_WHITE);
    video.putString("\n",COLOR_BLUE,COLOR_WHITE);
}

Does this gives any indication.

Please let me know if you see something wrong with the above code (I mean the whole code in my previous posts as well).

Meanwhile I will keep on tying and I will update the post if I find the solution

Thanks
Karim.

dansmahajan · Post by **dansmahajan** » Tue Nov 05, 2013 12:05 pm

your isrHandler is not returning the context or the stack pointer

kemosparc · Post by **kemosparc** » Tue Nov 05, 2013 12:21 pm

I don't understand what you mean

What should I do?

kemosparc · Post by **kemosparc** » Wed Nov 06, 2013 1:05 pm

Hi,

I managed to print the stack values just right before the iretq instruction inside my isrCommon wrapper.

I also got the correct return address using objdump

I compared both addresses and they are the same.

So the return address in the stack is correct.

I think that iretq is messing up for some reason. It generates a page fault.

I don't understand the last comment sent by dansmahajan, so if anyone understand it?

Kindly if any one have a solution to my problem or went through it before, let me know.

Thanks a lot
Karim

kemosparc · Post by **kemosparc** » Wed Nov 06, 2013 1:44 pm

Okay,

Debugging more I found that the iretq actually returns to the correct instruction in the original code that execution was transferred from.

Here is the code that calls the interrupt:

Code: Select all

void kernel_main()
{
    idtStart();
    Video video;
    video.clearScreen(COLOR_BLACK);
    video.putString("Welcome to KEMOX\n",COLOR_BLUE,COLOR_WHITE);
    video.putString("Author: Karim Sobh (kemosparc)\n",COLOR_CYAN,COLOR_BLACK);
    video.putDecimal(sizeof(idtEntry) * IDT_SIZE ,COLOR_CYAN,COLOR_BLACK);
    video.putString("\n",COLOR_CYAN,COLOR_BLACK);
    char * test = (char *) 0x20000000;
    memset (test,0,100);
    strcpy (test,"I am here in far memory\n");
    video.putString(test,COLOR_CYAN,COLOR_BLACK);


     asm volatile ("int $0x8");    <--- Here is where I force the interrupt 
	    
     video.putString("End\n",COLOR_CYAN,COLOR_BLACK);

}

and here is the code from objdump:

Code: Select all

    b410:       31 c9                   xor    %ecx,%ecx
    b412:       ba 03 00 00 00          mov    $0x3,%edx
    b417:       be 00 00 00 20          mov    $0x20000000,%esi
    b41c:       48 89 e7                mov    %rsp,%rdi
    b41f:       ff d3                   callq  *%rbx
    b421:       cd 08                   int    $0x8          <--- Here is where I force the interrupt 
    b423:       31 c9                   xor    %ecx,%ecx
    b425:       48 89 e7                mov    %rsp,%rdi
    b428:       ba 03 00 00 00          mov    $0x3,%edx
    b42d:       48 be 48 ba 00 00 00    movabs $0xba48,%rsi
    b434:       00 00 00 
    b437:       48 b8 c0 b7 00 00 00    movabs $0xb7c0,%rax
    b43e:       00 00 00 
    b441:       ff d0                   callq  *%rax
    b443:       48 89 e7                mov    %rsp,%rdi
    b446:       48 b8 f0 b9 00 00 00    movabs $0xb9f0,%rax

I was able to extract the RIP when the General Protection Fault occured and it was 0xb423, which is the next instruction after the interrupt.
This means that actually the execution was transferred back to where it should be after the interrupt.

I don't know why this instruction generates this exception.

I read some post and it one of them suggested that the page that has the code does not have an execution flag !! Can this be true.

Thanks
Karim.

sortie · Post by **sortie** » Wed Nov 06, 2013 1:51 pm

Are your kernel in both C and C++? The

Code: Select all

#if defined(__cplusplus)
extern "C"
#else
extern
#endif

sequence is completely stupid. First, if it was written in C++, just write extern "C" and not bother with preprocessor conditionals. If the kernel is written in C, then just write nothing at all: Functions are extern by default (as opposed to static).

kemosparc · Post by **kemosparc** » Wed Nov 06, 2013 1:57 pm

Thanks for the reply, but how is this related to my problem ?

Combuster · Post by **Combuster** » Wed Nov 06, 2013 3:29 pm

It's a code quality issue. Things like this indicate dents in your language use.

Run your code in Bochs, read the error messages, show them to us.

kemosparc · Post by **kemosparc** » Fri Nov 08, 2013 6:37 am

Hi,

Unfortunately, I cannot get Bochs x86_64 to work on my ubuntu.

I have tried !!!!

I have a question though, when I set up the GDT do I need to do anything regarding the pages that will have code in them. Because I read on the forum http://wiki.osdev.org/IDT_problems#Problems_with_IDTs that on of the reasons that the General Protection Fault Exception IR # 0xD happens is when there is a problem with the accessibility of the page that has the code that I am returning to does not allow executing the code for some reason. Also how to set CPL to ZERO before returning to my original instruction that the interrupt should return to.

I would like to know if inducing an interrupt from my kernel main function is correct in the first place and that I should excpect it to return, or not being able to return is normal. Below is my code I induce the interrupt with:

Code: Select all

void kernel_main()
{
    idtStart();
    Video video;
    video.clearScreen(COLOR_BLACK);
    video.putString("Welcome to KEMOX\n",COLOR_BLUE,COLOR_WHITE);
    video.putString("Author: Karim Sobh (kemosparc)\n",COLOR_CYAN,COLOR_BLACK);
    video.putDecimal(sizeof(idtEntry) * IDT_SIZE ,COLOR_CYAN,COLOR_BLACK);
    video.putString("\n",COLOR_CYAN,COLOR_BLACK);

    char * test = (char *) 0x20000000;
    memset (test,0,100);
    strcpy (test,"I am here in far memory\n");
    video.putString(test,COLOR_CYAN,COLOR_BLACK);
     asm volatile ("int $0x8");
    video.putString("Back From Interrupt\n",COLOR_CYAN,COLOR_BLACK);
}

To clarify my problem more I have attached some screen shots

The first screen shot is when I put a halt before the "int 0x8" returns inside the interrupt handler, and the second screen shot is when I put the halt after the "gereral Protection Fault" occur and before it return to prevent the qemu from reseting.

The third screen shot shows the objdump and this shows that when the int 0x8 is fired the return address is correct (compare the addresses int screen shot 1 and 3)

Kindly anyone have a look at the screen shots and the code above and let me know if you have any recommendations.

Thanks a lot.
karim

dansmahajan · Post by **dansmahajan** » Fri Nov 08, 2013 7:43 am

I think the problem is with your stack, you could do one thing dump all registers before the iret instruction is executed and post it here and also post the code where you have setup the stack

kemosparc · Post by **kemosparc** » Fri Nov 08, 2013 8:05 am

Okay,

I managed to make Bochs work finally.

Here is the log file after running in Bochs, I hope you can detect my problem form the log file and if you can please teach me

Code: Select all

00000000000i[     ] Bochs x86 Emulator 2.4.6
00000000000i[     ]   Build from CVS snapshot, on February 22, 2011
00000000000i[     ] Compiled at May  1 2012, 20:39:36
00000000000i[     ] System configuration
00000000000i[     ]   processors: 1 (cores=1, HT threads=1)
00000000000i[     ]   A20 line support: yes
00000000000i[     ] CPU configuration
00000000000i[     ]   level: 6
00000000000i[     ]   SMP support: no
00000000000i[     ]   APIC support: yes
00000000000i[     ]   FPU support: yes
00000000000i[     ]   MMX support: yes
00000000000i[     ]   3dnow! support: no
00000000000i[     ]   SEP support: yes
00000000000i[     ]   SSE support: sse2
00000000000i[     ]   XSAVE support: no
00000000000i[     ]   AES support: no
00000000000i[     ]   MOVBE support: no
00000000000i[     ]   x86-64 support: yes
00000000000i[     ]   1G paging support: no
00000000000i[     ]   VMX support: no
00000000000i[     ] Optimization configuration
00000000000i[     ]   RepeatSpeedups support: yes
00000000000i[     ]   Trace cache support: yes
00000000000i[     ]   Fast function calls: yes
00000000000i[     ] Devices configuration
00000000000i[     ]   ACPI support: yes
00000000000i[     ]   NE2000 support: yes
00000000000i[     ]   PCI support: yes, enabled=yes
00000000000i[     ]   SB16 support: yes
00000000000i[     ]   USB support: yes
00000000000i[     ]   VGA extension support: vbe 
00000000000i[MEM0 ] allocated memory at 0x7f6820097010. after alignment, vector=0x7f6820098000
00000000000i[MEM0 ] 2048.00MB
00000000000i[MEM0 ] mem block size = 0x00100000, blocks=2048
00000000000i[MEM0 ] rom at 0xfffe0000/131072 ('/usr/share/bochs/BIOS-bochs-latest')
00000000000i[MEM0 ] rom at 0xc0000/41472 ('/usr/share/bochs/VGABIOS-lgpl-latest')
00000000000i[     ] lt_dlhandle is 0x2b06e30
00000000000i[PLGIN] loaded plugin libbx_cmos.so
00000000000i[     ] lt_dlhandle is 0x2b07850
00000000000i[PLGIN] loaded plugin libbx_dma.so
00000000000i[     ] lt_dlhandle is 0x2b082b0
00000000000i[PLGIN] loaded plugin libbx_pic.so
00000000000i[     ] lt_dlhandle is 0x2b08af0
00000000000i[PLGIN] loaded plugin libbx_pit.so
00000000000i[     ] lt_dlhandle is 0x2b09460
00000000000i[PLGIN] loaded plugin libbx_vga.so
00000000000i[     ] lt_dlhandle is 0x2b09bc0
00000000000i[PLGIN] loaded plugin libbx_hdimage.so
00000000000i[     ] lt_dlhandle is 0x2b0a4c0
00000000000i[PLGIN] loaded plugin libbx_floppy.so
00000000000i[     ] lt_dlhandle is 0x2b0b080
00000000000i[PLGIN] loaded plugin libbx_soundmod.so
00000000000i[     ] lt_dlhandle is 0x2b0c700
00000000000i[PLGIN] loaded plugin libbx_pci.so
00000000000i[     ] lt_dlhandle is 0x2b0c5e0
00000000000i[PLGIN] loaded plugin libbx_pci2isa.so
00000000000i[     ] lt_dlhandle is 0x2b0dbe0
00000000000i[PLGIN] loaded plugin libbx_usb_common.so
00000000000i[     ] lt_dlhandle is 0x2b0e490
00000000000i[PLGIN] loaded plugin libbx_unmapped.so
00000000000i[     ] lt_dlhandle is 0x2b0ed00
00000000000i[PLGIN] loaded plugin libbx_biosdev.so
00000000000i[     ] lt_dlhandle is 0x2b0f630
00000000000i[PLGIN] loaded plugin libbx_speaker.so
00000000000i[     ] lt_dlhandle is 0x2b0fe60
00000000000i[PLGIN] loaded plugin libbx_extfpuirq.so
00000000000i[     ] lt_dlhandle is 0x2b106d0
00000000000i[PLGIN] loaded plugin libbx_gameport.so
00000000000i[     ] lt_dlhandle is 0x2b11050
00000000000i[PLGIN] loaded plugin libbx_pci_ide.so
00000000000i[     ] lt_dlhandle is 0x2b11ad0
00000000000i[PLGIN] loaded plugin libbx_acpi.so
00000000000i[     ] lt_dlhandle is 0x2b123f0
00000000000i[PLGIN] loaded plugin libbx_ioapic.so
00000000000i[     ] lt_dlhandle is 0x2b12cb0
00000000000i[PLGIN] loaded plugin libbx_keyboard.so
00000000000i[     ] lt_dlhandle is 0x2b13500
00000000000i[PLGIN] loaded plugin libbx_harddrv.so
00000000000i[     ] lt_dlhandle is 0x2b255c0
00000000000i[PLGIN] loaded plugin libbx_serial.so
00000000000i[     ] lt_dlhandle is 0x2b26480
00000000000i[PLGIN] loaded plugin libbx_parallel.so
00000000000i[CMOS ] Using local time for initial clock
00000000000i[CMOS ] Setting initial clock to: Fri Nov  8 15:57:47 2013 (time0=1383919067)
00000000000i[DMA  ] channel 4 used by cascade
00000000000i[DMA  ] channel 2 used by Floppy Drive
00000000000i[FDD  ] fd0: '/home/kmsobh/crossenv/Projects/KEMOX/kemox.img' ro=0, h=2,t=80,spt=18
00000000000i[PCI  ] 440FX Host bridge present at device 0, function 0
00000000000i[PCI  ] PIIX3 PCI-to-ISA bridge present at device 1, function 0
00000000000i[VGA  ] interval=50000
00000000000i[MEM0 ] Register memory access handlers: 0x00000000000a0000 - 0x00000000000bffff
00000000000i[XGUI ] test_alloc_colors: 16 colors available out of 16 colors tried
00000000000i[XGUI ] font 8 wide x 16 high, display depth = 24
00000000000i[MEM0 ] Register memory access handlers: 0x00000000e0000000 - 0x00000000e0ffffff
00000000000i[VGA  ] VBE Bochs Display Extension Enabled
00000000000i[PLGIN] init_dev of 'unmapped' plugin device by virtual method
00000000000i[PLGIN] init_dev of 'biosdev' plugin device by virtual method
00000000000i[PLGIN] init_dev of 'speaker' plugin device by virtual method
00000000000i[SPEAK] Failed to open /dev/console: Resource temporarily unavailable
00000000000i[SPEAK] Deactivating beep on console
00000000000i[PLGIN] init_dev of 'extfpuirq' plugin device by virtual method
00000000000i[PLGIN] init_dev of 'gameport' plugin device by virtual method
00000000000i[PLGIN] init_dev of 'pci_ide' plugin device by virtual method
00000000000i[PCI  ] PIIX3 PCI IDE controller present at device 1, function 1
00000000000i[PLGIN] init_dev of 'acpi' plugin device by virtual method
00000000000i[PCI  ] ACPI Controller present at device 1, function 3
00000000000i[PLGIN] init_dev of 'ioapic' plugin device by virtual method
00000000000i[IOAP ] initializing I/O APIC
00000000000i[MEM0 ] Register memory access handlers: 0x00000000fec00000 - 0x00000000fec00fff
00000000000i[PLGIN] init_dev of 'keyboard' plugin device by virtual method
00000000000i[KBD  ] will paste characters every 1000 keyboard ticks
00000000000i[PLGIN] init_dev of 'harddrv' plugin device by virtual method
00000000000i[HD   ] Using boot sequence floppy, none, none
00000000000i[HD   ] Floppy boot signature check is enabled
00000000000i[PLGIN] init_dev of 'serial' plugin device by virtual method
00000000000i[SER  ] com1 at 0x03f8 irq 4
00000000000i[PLGIN] init_dev of 'parallel' plugin device by virtual method
00000000000i[PAR  ] parallel port 1 at 0x0378 irq 7
00000000000i[PLGIN] register state of 'unmapped' plugin device by virtual method
00000000000i[PLGIN] register state of 'biosdev' plugin device by virtual method
00000000000i[PLGIN] register state of 'speaker' plugin device by virtual method
00000000000i[PLGIN] register state of 'extfpuirq' plugin device by virtual method
00000000000i[PLGIN] register state of 'gameport' plugin device by virtual method
00000000000i[PLGIN] register state of 'pci_ide' plugin device by virtual method
00000000000i[PLGIN] register state of 'acpi' plugin device by virtual method
00000000000i[PLGIN] register state of 'ioapic' plugin device by virtual method
00000000000i[PLGIN] register state of 'keyboard' plugin device by virtual method
00000000000i[PLGIN] register state of 'harddrv' plugin device by virtual method
00000000000i[PLGIN] register state of 'serial' plugin device by virtual method
00000000000i[PLGIN] register state of 'parallel' plugin device by virtual method
00000000000i[SYS  ] bx_pc_system_c::Reset(HARDWARE) called
00000000000i[CPU0 ] cpu hardware reset
00000000000i[APIC0] allocate APIC id=0 (MMIO enabled) to 0x00000000fee00000
00000000000i[CPU0 ] CPUID[0x00000000]: 00000003 756e6547 6c65746e 49656e69
00000000000i[CPU0 ] CPUID[0x00000001]: 00000f23 00000800 00002000 07cbfbff
00000000000i[CPU0 ] CPUID[0x00000002]: 00410601 00000000 00000000 00000000
00000000000i[CPU0 ] CPUID[0x00000003]: 00000000 00000000 00000000 00000000
00000000000i[CPU0 ] CPUID[0x00000004]: 00000000 00000000 00000000 00000000
00000000000i[CPU0 ] CPUID[0x00000007]: 00000000 00000000 00000000 00000000
00000000000i[CPU0 ] CPUID[0x80000000]: 80000008 00000000 00000000 00000000
00000000000i[CPU0 ] CPUID[0x80000001]: 00000000 00000000 00000001 2a100800
00000000000i[CPU0 ] CPUID[0x80000002]: 20202020 20202020 20202020 6e492020
00000000000i[CPU0 ] CPUID[0x80000003]: 286c6574 50202952 69746e65 52286d75
00000000000i[CPU0 ] CPUID[0x80000004]: 20342029 20555043 20202020 00202020
00000000000i[CPU0 ] CPUID[0x80000006]: 00000000 42004200 02008140 00000000
00000000000i[CPU0 ] CPUID[0x80000007]: 00000000 00000000 00000000 00000000
00000000000i[CPU0 ] CPUID[0x80000008]: 00003028 00000000 00000000 00000000
00000000000i[PLGIN] reset of 'unmapped' plugin device by virtual method
00000000000i[PLGIN] reset of 'biosdev' plugin device by virtual method
00000000000i[PLGIN] reset of 'speaker' plugin device by virtual method
00000000000i[PLGIN] reset of 'extfpuirq' plugin device by virtual method
00000000000i[PLGIN] reset of 'gameport' plugin device by virtual method
00000000000i[PLGIN] reset of 'pci_ide' plugin device by virtual method
00000000000i[PLGIN] reset of 'acpi' plugin device by virtual method
00000000000i[PLGIN] reset of 'ioapic' plugin device by virtual method
00000000000i[PLGIN] reset of 'keyboard' plugin device by virtual method
00000000000i[PLGIN] reset of 'harddrv' plugin device by virtual method
00000000000i[PLGIN] reset of 'serial' plugin device by virtual method
00000000000i[PLGIN] reset of 'parallel' plugin device by virtual method
00000000000i[XGUI ] [x] Mouse off
00000003305i[BIOS ] $Revision: 1.257 $ $Date: 2011/01/26 09:52:02 $
00000318057i[KBD  ] reset-disable command received
00000447887i[VBIOS] VGABios $Id: vgabios.c,v 1.75 2011/10/15 14:07:21 vruppert Exp $
00000447958i[VGA  ] VBE known Display Interface b0c0
00000447990i[VGA  ] VBE known Display Interface b0c5
00000450915i[VBIOS] VBE Bios $Id: vbe.c,v 1.64 2011/07/19 18:25:05 vruppert Exp $
00000600000i[XGUI ] charmap update. Font Height is 16
00000771030i[BIOS ] Starting rombios32
00000771460i[BIOS ] Shutdown flag 0
00000772051i[BIOS ] ram_size=0x80000000
00000772511i[BIOS ] ram_end=2048MB
00000813011i[BIOS ] Found 1 cpu(s)
00000828848i[BIOS ] bios_table_addr: 0x000fb928 end=0x000fcc00
00000828946i[PCI  ] 440FX PMC write to PAM register 59 (TLB Flush)
00001156642i[PCI  ] 440FX PMC write to PAM register 59 (TLB Flush)
00001484573i[P2I  ] PCI IRQ routing: PIRQA# set to 0x0b
00001484592i[P2I  ] PCI IRQ routing: PIRQB# set to 0x09
00001484611i[P2I  ] PCI IRQ routing: PIRQC# set to 0x0b
00001484630i[P2I  ] PCI IRQ routing: PIRQD# set to 0x09
00001484640i[P2I  ] write: ELCR2 = 0x0a
00001485400i[BIOS ] PIIX3/PIIX4 init: elcr=00 0a
00001493052i[BIOS ] PCI: bus=0 devfn=0x00: vendor_id=0x8086 device_id=0x1237 class=0x0600
00001495297i[BIOS ] PCI: bus=0 devfn=0x08: vendor_id=0x8086 device_id=0x7000 class=0x0601
00001497381i[BIOS ] PCI: bus=0 devfn=0x09: vendor_id=0x8086 device_id=0x7010 class=0x0101
00001497603i[PIDE ] new BM-DMA address: 0xc000
00001498207i[BIOS ] region 4: 0x0000c000
00001500209i[BIOS ] PCI: bus=0 devfn=0x0b: vendor_id=0x8086 device_id=0x7113 class=0x0680
00001500432i[ACPI ] new irq line = 11
00001500444i[ACPI ] new irq line = 9
00001500473i[ACPI ] new PM base address: 0xb000
00001500487i[ACPI ] new SM base address: 0xb100
00001500515i[PCI  ] setting SMRAM control register to 0x4a
00001664608i[CPU0 ] Enter to System Management Mode
00001664618i[CPU0 ] RSM: Resuming from System Management Mode
00001828640i[PCI  ] setting SMRAM control register to 0x0a
00001837372i[BIOS ] MP table addr=0x000fba00 MPC table addr=0x000fb930 size=0xd0
00001839151i[BIOS ] SMBIOS table addr=0x000fba10
00001842324i[BIOS ] Firmware waking vector 0x7fff00cc
00001847242i[BIOS ] ACPI tables: RSDP addr=0x000fbb30 ACPI DATA addr=0x7fff0000 size=0x1f18
00001847278i[PCI  ] 440FX PMC write to PAM register 59 (TLB Flush)
00001847996i[BIOS ] bios_table_cur_addr: 0x000fbb54
00014041549i[BIOS ] Booting from 0000:7c00
00016777673e[CPU0 ] iret64: return CS selector null
00272708000p[XGUI ] >>PANIC<< POWER button turned off.
00272708000i[CPU0 ] CPU is in long mode (active)
00272708000i[CPU0 ] CS.d_b = 16 bit
00272708000i[CPU0 ] SS.d_b = 16 bit
00272708000i[CPU0 ] EFER   = 0x00000500
00272708000i[CPU0 ] | RAX=0000000000000060  RBX=000000000000b980
00272708000i[CPU0 ] | RCX=0000000000001f00  RDX=00000000000003d5
00272708000i[CPU0 ] | RSP=000000000008fe30  RBP=000000000000ba30
00272708000i[CPU0 ] | RSI=0000000000000060  RDI=00000000000003d5
00272708000i[CPU0 ] |  R8=00000000000b0000   R9=0000000000000034
00272708000i[CPU0 ] | R10=0000000000000003  R11=00000000cccccccd
00272708000i[CPU0 ] | R12=000000000000000d  R13=000000000000000d
00272708000i[CPU0 ] | R14=0000000000000000  R15=0000000000000000
00272708000i[CPU0 ] | IOPL=0 id vip vif ac vm rf nt of df if tf sf zf af PF cf
00272708000i[CPU0 ] | SEG selector     base    limit G D
00272708000i[CPU0 ] | SEG sltr(index|ti|rpl)     base    limit G D
00272708000i[CPU0 ] |  CS:0008( 0001| 0|  0) 00000000 00000000 0 0
00272708000i[CPU0 ] |  DS:0010( 0002| 0|  0) 00000000 00000000 0 0
00272708000i[CPU0 ] |  SS:0000( 0000| 0|  0) 00000000 00000000 0 0
00272708000i[CPU0 ] |  ES:0010( 0002| 0|  0) 00000000 00000000 0 0
00272708000i[CPU0 ] |  FS:0010( 0002| 0|  0) 00000000 00000000 0 0
00272708000i[CPU0 ] |  GS:0010( 0002| 0|  0) 00000000 00000000 0 0
00272708000i[CPU0 ] |  MSR_FS_BASE:0000000000000000
00272708000i[CPU0 ] |  MSR_GS_BASE:0000000000000000
00272708000i[CPU0 ] | RIP=000000000000b363 (000000000000b363)
00272708000i[CPU0 ] | CR0=0xe0000011 CR2=0x0000000000000000
00272708000i[CPU0 ] | CR3=0x00001000 CR4=0x00000020
00272708000i[CPU0 ] 0x000000000000b363>> jmp .-2 (0x000000000000b363) : EBFE
00272708000i[CMOS ] Last time is 1383919135 (Fri Nov  8 15:58:55 2013)
00272708000i[XGUI ] Exit
00272708000i[     ] restoring default signal behavior
00272708000i[CTRL ] quit_sim called with exit code 1

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