Hello everyone,
I have been searching about this all over internet. In wiki they gave that i can find address of PCI Express extended configuration space in MCFG table of ACPI but there is no such table in RSDT or XSDT. In wiki its also been told that in FADT the GAS (generic address space) might contain pointers to the PCI E configuration space but in the FADT specification they didn't mention of any GAS related to PCI E.
Where can i find it?
Thank you
How To access PCI Express extended configuration space
How To access PCI Express extended configuration space
Walking my way in making my OS
Re: How To access PCI Express extended configuration space
Search the ACPI Root System Descriptor Table for the signature "MCFG". and follow the pointer to that table. At offset 0x2C in that table is the base address of PCI Extended Configuration Space.
The top end of the first 4Gb will soon be as busy as Clapham Junction. Windows XP used to run quite happily in 256mb of memory, but now we have got that much memory reserved for a handful of devices on the PCI bus. If somebody said "I would like 4Gb of memory for my exclsive use please", would they get it? Well, if they were PCI Sig, they probably would.
In practice we could probably carry on using the old fashioned i/o port mechanism, because most of the registers (even if used) are vendor specific, and probably only usable by device drivers supplied by them.
The top end of the first 4Gb will soon be as busy as Clapham Junction. Windows XP used to run quite happily in 256mb of memory, but now we have got that much memory reserved for a handful of devices on the PCI bus. If somebody said "I would like 4Gb of memory for my exclsive use please", would they get it? Well, if they were PCI Sig, they probably would.
In practice we could probably carry on using the old fashioned i/o port mechanism, because most of the registers (even if used) are vendor specific, and probably only usable by device drivers supplied by them.
Re: How To access PCI Express extended configuration space
> but now we have got that much memory reserved for a handful of devices on the PCI bus.
Don't mess memory and address space, please. Devices require I/O space, i.e. ranges of physical addresses. There are no physical memory (I mean _main_ RAM hare, of course some device can map its own memory to its MMIO range) at these addresses because chipset can remap RAM elsewhere.
Don't mess memory and address space, please. Devices require I/O space, i.e. ranges of physical addresses. There are no physical memory (I mean _main_ RAM hare, of course some device can map its own memory to its MMIO range) at these addresses because chipset can remap RAM elsewhere.
Re: How To access PCI Express extended configuration space
Thank you Casm.
Now i have another problem. I found pci extended configuration space. The first "configuration space base address allocation structure" says that it points from bus 79 to 83.
1) Is it normal or possible that the first structure pointing buses numbered like 79?
2) How should i know that how many such pointing structures are present after the mcfg table?
3)Is there any mechanism using which i can end my search for such structures in the memory after mcfg table?
Please some body reply. Stuck here after locating mcfg and getting the first base address pointing structure.
Now i have another problem. I found pci extended configuration space. The first "configuration space base address allocation structure" says that it points from bus 79 to 83.
1) Is it normal or possible that the first structure pointing buses numbered like 79?
2) How should i know that how many such pointing structures are present after the mcfg table?
3)Is there any mechanism using which i can end my search for such structures in the memory after mcfg table?
Please some body reply. Stuck here after locating mcfg and getting the first base address pointing structure.
Walking my way in making my OS