From what I'm reading on the Wiki, it looks like I don't need a TSS until I transition to user mode, and thus kernel-mode-only code, such as boot code, should be fine without one.
However, I picked this up by reading between the lines (the Wiki says I need a TSS for interrupts in user mode, but doesn't say anything about whether I need one for interrupts in kernel mode, and I'm assuming that the fact that nothing is said about kernel mode means a TSS isn't needed there), so I'm uncertain that I haven't overlooked something.
So have I interpreted things correctly, or is there something waiting to bite me in the rear if I enable interrupts without a TSS in ring 0?
When do I first need a TSS?
Re: When do I first need a TSS?
Let me put it another way, without a proper TSS the CPU will fault (#TS) when:
- switch between ring
- perform hardware task switch (jmp, trap, etc)
So it should be fine without TSS for a ring0 only system.
However, my advise is to setup a dummy TSS anyway, it's only a few line of code.
- switch between ring
- perform hardware task switch (jmp, trap, etc)
So it should be fine without TSS for a ring0 only system.
However, my advise is to setup a dummy TSS anyway, it's only a few line of code.
Re: When do I first need a TSS?
You need a TSS for the Double Fault handler, if you have one. Therefore, you also need a default TSS.
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Re: When do I first need a TSS?
You don't need a TSS there. In case of the doublefault, it only gives you more time to crash.
Re: When do I first need a TSS?
Even if you stay with RING0, there are times where you need a known good stack. Of course it can be double fault.
I have implemented the equivalent of try { } catch {} in RING0. If I get a stack fault in one RING0 thread, I can just kill this thread and then trigger an orderly shutdown.
I guess there are also issues with using SSE instructions without TSS but I am not too sure.
I have implemented the equivalent of try { } catch {} in RING0. If I get a stack fault in one RING0 thread, I can just kill this thread and then trigger an orderly shutdown.
I guess there are also issues with using SSE instructions without TSS but I am not too sure.