Hi all!
I've managed to setup the LAPIC timer, meaning that I can fire successfully an interrupt. My problem is that I can do it only once and I cannot figure out why; I think that the problem is so silly that I cannot even see it; this happens with both bochs and quemu.
There are no faults or whatever, te BSP continue booing until completion
However this is quite annoying because I'd like to use the timer to make a delay between the INIT-SIPI-SIPI IPI sequence. I ran out of ideas...
Upon return the LVT timer entry seems normal, IRR, delivery status and mask are cleared.
Thank you in advance!
Teo
I cannot make the LAPIC timer work more than once
I cannot make the LAPIC timer work more than once
OS development is the intelligent alternative to drugs
Re: I cannot make the LAPIC timer work more than once
It's time to show your code.
Re: I cannot make the LAPIC timer work more than once
Ok, as soon I get back home from office I'll give you some code. What I see is that the delay function is stuck in an infinite loop because the exit condition is never metNable wrote:It's time to show your code.
After some inspection (I don't know if its possible to increase the verbosity of the log of bochs) I know that
* there's no error before and after setting the LAPIC registers (bochs reports the second write the the lapic)
* the stack after returning from the first interrupt is not corrupted
* the behaviour is the same when x2APIC mode is disabled
* there are no unbalanced CLI /STI
* the IF is set after returning form the interrupt gate which serves the timer as expected
I think that the problem might not be the LAPIC, but it might come from far... I have a lot of checks to do!
Thanks!
MEM
OS development is the intelligent alternative to drugs
Re: I cannot make the LAPIC timer work more than once
It's probably because you don't send EOI, or because you don't reload it.
[SOLVED] I cannot make the LAPIC timer work more than once
Ok we might have a winner!rdos wrote:It's probably because you don't send EOI, or because you don't reload it.
I didn't EOI on purpose (it was on my checklist) because I believed that the LAPIC LVT interrupts didn't need that; I was pretty sure such interrupts were local, clearly misinterpreting the Intel documentation!
I'll check ASAP and I'll let you know!
Thank you!
EDIT: you were right! Thx again!
MEM
OS development is the intelligent alternative to drugs