I/O APIC on Virtualbox

[AlfaOmega08]

I'm trying to use the PIT to do APIC timer calibration, and I want to use the PIT through I/O APIC instead of PIC. On Bochs I get interrupts from the PIT at the asked frequency from the I/O APIC, while on Virtualbox I can't receive a single interrupt. It must be an I/O APIC configuration problem because as I unmask the first PIC entry, the IRQ fires. However that's not what I want.

Can you imagine any possible condition that wouldn't make Virtualbox fire the IRQ?
I'm not assuming single I/O APIC configuration (even though Virtualbox has only 1). I'm not assuming identity mappings between ISA IRQs and I/O APIC GSIs (using ACPI MADT table to get I/O APIC base address and Int override). I'm setting the Trigger Mode and Polarity bits correctly (on Virtualbox they are set as '00 - default' which means edge high right?). I'm putting the BSP APIC ID into the Destination field (using Physical destination) and vector 0x20.

Being the BSP APIC ID 0 on Virtualbox, it ends up with 0x0000000000000020 written to the IOREDTBL. And, just in case I'm getting the wrong values from the Interrupt Override descriptor, I'm setting this value to all the IOREDTBL entries (I know this is very very bad, and it wont be kept as I understand what's going on).

The only thing I didn't check out is Local APIC configuration. Actually I'm not writing any value to the BSP LAPIC. Just reading the APIC ID and using it to boot APs through IPIs. And obviously I'm setting bit 11 in the IA32_APIC_BASE MSR to enable the LAPIC. Any ideas?

Thanks in advance.

[gerryg400]

Actually I'm not writing any value to the BSP LAPIC.

At the very least you need to write to the SIV to enable the APIC.

Code: Select all

    /* Enable the apic and set the spurious vector to 0x2f */
    apic_write (LAPIC_SIV, 0x12f);

[AlfaOmega08]

Thank you... That was the anwer. I don't know how I could have missed that while reading the Intel Manuals... I tought IA32_APIC_BASE would have sufficed.

Anyway Bochs has a SIV of 0x1FF, while Virtualbox has 0x0FF. Obviously Virtualbox is right as Intel Manuals specify that after a reset the SIV is 0xFF. Why does bochs behave like this??

I have another problem with I/O APIC, but this time on Bochs. Bochs doesn't report any Interrupt Source Override. So I would expect the PIT to fire on IRQ 0, just like on the traditional PIC. And the same would be for any other ISA IRQ. Why the hell does the PIT fire on IRQ 2 instead on IRQ 0??

On Virtualbox it fires on IRQ 2 too, but there I have an Interrupt Source Override structure...

Thanks again for your precious help.

Edit: just found that also my physical machine sets the SIV to 0x10F...

[xenos]

Anyway Bochs has a SIV of 0x1FF, while Virtualbox has 0x0FF. Obviously Virtualbox is right as Intel Manuals specify that after a reset the SIV is 0xFF. Why does bochs behave like this??

Actually Bochs does set the SIV to 0xff on a hardware reset, see line 249 here (the "software enabled" bit is cleared). However, the BIOS plays around with the SIV and enables the APIC, here's the relevant excerpt from a freshly created log file:

Code: Select all

d14763187888:000e1700[APIC0] LAPIC write 0x000001ff to register 0x00f0
d14763187888:000e1700[APIC0] write of 000001ff to spurious interrupt register