Random Single Step/Debug exception.

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Caleb1994
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Random Single Step/Debug exception.

Post by Caleb1994 »

I am getting a random "Single Step/Debug" exception. I don't think it has anything to do with it, but I am currently testing my execute function, and am running in user mode. I have single stepped (no relation :P) through the loaded executables code and it executes just fine (right now it's just 3 instructions," mov %eax,SYSCALL_YIELD" and "int $0x80" then "jmp entry").

I read on the wiki that it could fire for a few different reasons, so I pulled up my intel manual. Sadly, my manual says that the Single Step/Debug exception (vector 1) is reserved. :shock:

Can someone give me some more information on when and why the Debug exception occurs?


Edit:
Found some more information on the debug registers. This page is helpful: http://www.logix.cz/michal/doc/i386/chp12-02.htm

I check DR6, bits 13-15. Bit 14 was set, and according to that page, this means it was a result of Trap Flag being set in EFLAGS, but I never set TF... I setup EFLAGS like so:

Code: Select all

newreg->eflags = 0x102; // (IF | IOPL=0)
and inside the exception handler, it says EFLAGS from before the interrupt was 0x102, which is IF, and some reserved value that is always set by Intel. This all looks correct, but I'm still getting this exception. :(


Is it safe to just ignore the debug exception? According to the wiki, it could be a fault, but I can't find documentation on how to determine that.
Casm
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Re: Random Single Step/Debug exception.

Post by Casm »

I would try reading page 5-29 of volume 3A in the Intel manuals.
Caleb1994
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Re: Random Single Step/Debug exception.

Post by Caleb1994 »

Oh... my... gosh... I feel extremely retarded... 0x200 is bit 9... 0x100 is bit 8... I was setting TF, instead of IF...

Sorry to waste you guys time... lol

I just changed my eflags to 0x200200 (added CPUID capabilities also). It works now. lol
Casm
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Re: Random Single Step/Debug exception.

Post by Casm »

berkus wrote:See some thread around with questions "WTF do you use (1<<8) instead of 0x200... erm.. 0x100".
2^9 = 512
2^10 = 1024
2^20 = 1mb

They begin to stick in your head after a while.
Caleb1994
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Re: Random Single Step/Debug exception.

Post by Caleb1994 »

berkus wrote:
Caleb1994 wrote:Oh... my... gosh... I feel extremely retarded... 0x200 is bit 9... 0x100 is bit 8... I was setting TF, instead of IF...

Sorry to waste you guys time... lol

I just changed my eflags to 0x200200 (added CPUID capabilities also). It works now. lol
See some thread around with questions "WTF do you use (1<<8) instead of 0x200... erm.. 0x100".
Hahaha yeah. I should probably use constant shifts, and let the compiler do the dirty bit work for me from now on... #-o
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