Native Mode ATA query

[cptpingu]

Hi, looking for someone who may have experienced similar issue and overcome it!!

Have a long mode OS booting up, SMP, IO APIC, got basic GUI classes and everything's great in vmware. On real hardware I cannot get the native mode ATA controller to fire an interrupt unless I poll for DRQ (using alt. status reg) and then read the status register twice asserts the interrupt. Not great obviously!

Even IDENTIFY isn't firing an interrupt until two reads from the status register after. As far as I can see im following guidelines set out by ATA specs, read lots of material and varying versions of the specs and forums/articles all over the place.

I can only assume it's the native mode ATA controller and something I'm missing. I have got correct ports from PCI configuration space and the IRQ assign by BIOS is 15. Which as I say ,is correctly routed as I get the isr to fire by doing two status reads from the status reg after sending the command.

At a complete loss and praying someone has solved this before!!

Thanks

[cptpingu]

Quite a few reads and no replies

I'm open to suggestions, even simple stuff in case i just managed to miss something really basic or i've done something silly that is causing this strange behaviour of the ATA controller and perhaps someone has done it before?

For some reason, the pesky Interrupt not firing unless I poll for DRQ and read the status register twice.

eg... (very simplified, not my actual code just from memory an example, i have ran code almost identifical to this for testing)

• <snip setting up port values and ensuring nIEN bit clear>
  mov dx,0x1F7 (or command port equivalent read from PCI config space)
  mov al,0xEC
  out dx,al ;send IDENTIFY
  
  mov rcx,FFFFFFFFFF
  .sillypause: dec rcx
  jnz .sillypause ;still no interrupt yet no matter how long you wait here
  
  in al,dx ;read status - still no interrupt
  in al,dx ;read status again and IRQ from IDENTIFY now fires!

The same applies with a READ_SECTORS command too, don't get an IRQ until at any time after the command has completed, I read the status registers twice!

Really don't get it. I don't consider myself new to any of this however it is the first ever time i've posted for help as i'm at a complete loss and was hoping someone may have an idea... any idea???

[cptpingu]

Anything? Anyone?

clutching at straws, but the Ata controller in question is on pci bus 3 (behind a pci pci bridge)... Not had much dealings with bus bridges could they somehow be holding the ata interrupts back?? the bridge also reports the same IRQ??? Any suggestions?