Cross-posted from Stack Overflow for coverage.
Our hardware is a variety of Intel-based x86 machines and a beagleboard, all of which throw similar behaviour.
EHCI - Transaction Errors on Real Hardware
Re: EHCI - Transaction Errors on Real Hardware
As discussed in the irc, here you find our EHCI/USB transactions in PrettyOS: http://forum.osdev.org/viewtopic.php?f=1&t=22246
Hope you can help us to overcome our stop 'n' go system, but it works well at real hardware.
Crucial points AFAIR:
1) getting the EHCI back from BIOS
2) bus mastering (bit 2 PCI), emulators are here not sensitive
3) extended buffers at qTD (also for 32 bit)
4) one QH for each endpoint (thus one QH for default ep0 is enough)
5) correct toggling per endpoint
Hope you can help us to overcome our stop 'n' go system, but it works well at real hardware.
Crucial points AFAIR:
1) getting the EHCI back from BIOS
2) bus mastering (bit 2 PCI), emulators are here not sensitive
3) extended buffers at qTD (also for 32 bit)
4) one QH for each endpoint (thus one QH for default ep0 is enough)
5) correct toggling per endpoint
http://www.henkessoft.de/OS_Dev/OS_Dev3.htm (OSDEV)
http://www.c-plusplus.de/forum/viewforu ... is-62.html
irc.euirc.net #PrettyOS
http://www.c-plusplus.de/forum/viewforu ... is-62.html
irc.euirc.net #PrettyOS
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Re: EHCI - Transaction Errors on Real Hardware
These two have ended up being the key - I've at least gotten one completed (hacked together) transaction - SET ADDRESS appeared to work. Once I remove the hack and make it work properly I'll know if our problem is in fact solved or if there's still something that needs to be done.3) extended buffers at qTD (also for 32 bit)
4) one QH for each endpoint (thus one QH for default ep0 is enough)