Self-referencing pm4l and -2GB kernel

[gerryg400]

I'm playing with setting the pml4 to point to itself and really just coming to terms with how that works. I didn't use this idea in my 32bit kernel. As I understand it, the space from 0xffff ff80 0000 0000 to 0xffff ffff ffff ffff will be taken by page tables. But I'm building my kernel with "-mcmodel=kernel" and my kernel entry point is 0xffff ffff 8000 0000.

Are these two things (self-referencing tables and -2GB kernel) mutually exclusive ?

Thanks in advance

[Gigasoft]

Of course not. Just use any of the other 511 entries. For example, use entry 510, placing your page tables at 0xffffff00 00000000 through 0xffffff7f ffffffff.

[gerryg400]

Thanks Gigasoft! I can't believe it's that simple. Well, of course I believe it, but I'm off to draw a diagram anyway.

[gerryg400]

Okay. Please tell me whether I've understood this at least a little bit. I feel confused by the so-called recursive nature of what happens here. I suspect I'm not going to understand it fully until I've got it somewhat working and can actually see what's happening. Remember my kernel is the -2GB type.

My 2 assumptions:
1. I'm going to make it so that pm4l[510] contains the physical address of pm4l.
2. I'm going to put the pm4l table at virtual address 0xFFFFFF7F FFFFF000. <<<<---- edit - incorrect!!

Is that correct ?

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0xFFFFFF7F FFFFF000 to 0xFFFFFF7F FFFFFFFF - mapping of all page map level 4 entries in the address space
0xFFFFFF7F FFE00000 to 0xFFFFFF7F FFFFFFFF - mapping of all page directory pointer table entries in the address space
0xFFFFFF7F C0000000 to 0xFFFFFF7F FFFFFFFF - mapping of all page directory entries in the address space
0xFFFFFF00 00000000 to 0xFFFFFF7F FFFFFFFF - mapping of all page table entries in the address space

It just doesn't seem right. In the scheme where [511] is used, [511] is used at each level recursively. But if I use [510] at the top level doesn't that mean I need to use [510] at the lower levels as well ? Does anyone know what I mean ? That would mean my pm4l table is at virtual address 0xFFFFFF7F BFDFE000.

[xenos]

But if I use [510] at the top level doesn't that mean I need to use [510] at the lower levels as well ? Does anyone know what I mean ? That would mean my pm4l table is at virtual address 0xFFFFFF7F BFDFE000.

Indeed, it does. The page table layout gets a bit mixed up...

[gerryg400]

Thanks XenOs. These are my calculations using 510 as the recursive slot number. Can anyone confirm that I'm on the right track with this. It's just starting to make sense I think.

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0xFFFFFF7F BFDFE000 to 0xFFFFFF7F BFDFEFFF - mapping of all page map level 4 entries in the address space
0xFFFFFF7F BFC00000 to 0xFFFFFF7F BFDFFFFF - mapping of all page directory pointer table entries in the address space
0xFFFFFF7F 80000000 to 0xFFFFFF7F BFFFFFFF - mapping of all page directory entries in the address space
0xFFFFFF00 00000000 to 0xFFFFFF7F FFFFFFFF - mapping of all page table entries in the address space

Thanks in advance

[gerryg400]

For anyone who searches and finds this thread, I have my mm working again and those addresses appear correct. I used the following macros to find the arrays

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#define RECURSIVE_SLOT (510L)

#define L4_SHIFT (39)
#define L3_SHIFT (30)
#define L2_SHIFT (21)
#define L1_SHIFT (12)

#define UPPER_ADDR(x) ((uint64_t*)(0xffffL<<48|(x)))

#define PGTBL_ADDR UPPER_ADDR((RECURSIVE_SLOT<<L4_SHIFT))

#define PGDIR_ADDR UPPER_ADDR((RECURSIVE_SLOT<<L4_SHIFT) \
							|(RECURSIVE_SLOT<<L3_SHIFT))

#define PDPT_ADDR UPPER_ADDR((RECURSIVE_SLOT<<L4_SHIFT) \
							|(RECURSIVE_SLOT<<L3_SHIFT) \
							|(RECURSIVE_SLOT<<L2_SHIFT))

#define PML4T_ADDR UPPER_ADDR((RECURSIVE_SLOT<<L4_SHIFT) \
							|(RECURSIVE_SLOT<<L3_SHIFT) \
							|(RECURSIVE_SLOT<<L2_SHIFT) \
							|(RECURSIVE_SLOT<<L1_SHIFT))

- gerryg400

[xenos]

These are my calculations using 510 as the recursive slot number. Can anyone confirm that I'm on the right track with this.

Looks fine to me. It's probably a bit confusing at first sight because the higher level page tables are somewhere in the middle of the lower order page tables, but this is exactly how it works in this case.