Long Mode Paging Problem [solved]

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Hangin10
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Long Mode Paging Problem [solved]

Post by Hangin10 »

I thought I had recursive paging working in Long Mode, but now it would seem that's only because I confirmed it by looking at linear memdumps in Bochs rather than actually using it in code (and the view page tables in the GUI debugger does not appear to work well).

I think after setting the last entry of a PML4 to itself, page tables will appear at 0xFFFFFF8000000000, directories at 0xFFFFFFFFC0000000, and PDPointers at 0xFFFFFFFFFFE00000, with the PML4 itself being the last addressable page.

After I set up my free page bitmaps, I attempt to create a mapping of all physically addressable (and existing, returned by BIOS/GRUB mmap) memory at 0xFFFFE00000000000.

So, any newly created PML4 entries start at index 0x1C0. Which makes the PDP entries start at 0xFFFFFFFFFFFC0000, then Page Directory Entries (pointing to 2MB pages rather than page tables) at 0xFFFFFFFFF8000000.

Allocation of all these pages seems to work just fine, as I only get a page fault when I try to write to 0xFFFFE00000000070. The error code is 0xB. This indicates that the fault was caused by write and a reserved bit is set somewhere. At the very least, I did notice that writing to the PML4 using the last page location made the dirty bit get set, which is a reserved bit instead in a PML4 (I don't know if that would cause a fault. I doubt it as the next instruction fetch after causing the bit to be set would cause one if that was the case, yes?).

I've spent most of the night wondering if I've lost the ability to add :?
Any advice would be much appreciated.
Last edited by Hangin10 on Sun Apr 11, 2010 10:23 am, edited 2 times in total.
geppyfx
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Re: Long Mode Paging Problem

Post by geppyfx »

Architectural limit of physical address on amd64(x86-64) is 52bits. Some processors can go only as high as 40bits.
Anyway both linear & physical address limits can be found with CPUID (eax=80000008h)

Regarding entries in paging structures: bit63 is EXB, bits [62:52] available to use, bits[51:40] either 0 or part of address(cpuid 80000008h)

I remember bochs had some strict address limits, maybe still does.


EDIT:
yep, 48bits for linear, 32 bits for physical, in bochs-2.4.1 as reported by cpuid.
Last edited by geppyfx on Sat Apr 10, 2010 1:02 pm, edited 2 times in total.
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Owen
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Re: Long Mode Paging Problem

Post by Owen »

Bochs generally implements a 32-bit address space. Intels generally implement a 36-bit physical address space.
Hangin10
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Re: Long Mode Paging Problem

Post by Hangin10 »

I only attempt to map as much physical memory as reported in the memory map returned by the BIOS (through GRUB). Bochs is currently configured for 128MB, which results in one page of page directory pointers and one page directory (even though I've incremented both numbers after that just to make sure).

I know how the address space(s) work in long mode, I'm not otherwise having any trouble with long mode or Bochs. I'm just having difficulty with using recursive paging structures, probably because there's so many levels of page mapping in long mode.

If someone would like to look at code rather than help by doing math, here's a pastebin of the relevant source file: http://pastebin.com/GAzpjDZ3
(the function to map physical memory is first)
Last edited by Hangin10 on Sat Apr 10, 2010 5:13 pm, edited 1 time in total.
geppyfx
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Re: Long Mode Paging Problem

Post by geppyfx »

Hangin10 wrote: Allocation of all these pages seems to work just fine, as I only get a page fault when I try to write to 0xFFFFE00000000070.
What is the maximum linear address supported by cpu?
Hangin10
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Re: Long Mode Paging Problem

Post by Hangin10 »

geppyfx wrote:
Hangin10 wrote: Allocation of all these pages seems to work just fine, as I only get a page fault when I try to write to 0xFFFFE00000000070.
What is the maximum linear address supported by cpu?
Wouldn't that be 48bits, the minimum of any recent x86-64 cpu? The kernel is already running at 0xFFFF800000000000. What am I missing here?
geppyfx
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Re: Long Mode Paging Problem

Post by geppyfx »

I would never try using 64bit addr if cpuid tells you 48bit is max. Waiting for clarification from somebody else how you got kernel running at 64bit address.
Hangin10
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Re: Long Mode Paging Problem

Post by Hangin10 »

In long mode, linear addresses are sign extended from the end of the supported linear address size creating top and bottom halves with a large invalid zone if the max linear size is not 64bits. The low half becomes 0 to 0x7FFFFFFFFFFF, with the high half being 0xFFFF800000000000 onwards for a 48bit linear address size.

EM64T briefly mentions sign extending. Perhaps I should attempt to add more 64bit information to the wiki? I'd do it tonight, but I'm going to be at the local observatory (staff is needed even when it is cloudy, you'd be surprised how many people think telescopes can see through clouds and rain because they are "powerful" #-o ).

Edit: Turned out to be a problem with my physical page allocator, rather than anything to do with paging. :oops: My thanks to those who tried to help
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