Confuse over the descriptor segment entry in Qemu

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junkoi
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Confuse over the descriptor segment entry in Qemu

Post by junkoi »

Hi,

I am watching the Linux OS in QEMU, and see:

....
CS =0060 00000000 ffffffff 00c09b00 DPL=0 CS32 [-RA]
....

This means the CS selector is 60, base of CS is 0, segment limit is FFFF-FFFF, and bits 32-63 is 00C09B00 ...

Everything looks OK, however, when I tried to calculate the limit manually, because the Segment limit in bits from 16-19 in 00C09B00 is 0 (between C and 9 in C09B00), so the limit should be

((FFFF | (C09B00 & F0000)) << 12) | 0xFFF = (FFFF << 12) | FFF = FFF-FFFF,

and this not the expected FFFF-FFFF, as in the right limit above!

So I think that 00C09B00 should be 00CF9B00, so we can calculate the segment limit as:

((FFFF |(CF9B00 & F0000)) << 12) | 0xFFF = 0xFFFF-FFFF,

Which is expected segment limit.

But obviously Qemu is not wrong, so I must be wrong somewhere. Still I cannot figure out where I am wrong.

Please anybody helps?

Thanks,
Jun

So that
ffffffff ffffffff
Gigasoft
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Re: Confuse over the descriptor segment entry in Qemu

Post by Gigasoft »

Maybe it's ANDing the upper part with 0xFFFF00 when displaying it?
junkoi
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Re: Confuse over the descriptor segment entry in Qemu

Post by junkoi »

Do you really mean they masked out the hight bits of segment limit? No, they dont do that, as far as I saw in the source code.
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