Hello all,
I have successfully read my UHCI controller's BAR4 which gave me 0xFFFFFFC1. I guess this suggests I need to map 0x03FFFFFF in the PCI I/O address space. Unfortunately, I am extremely confused on how to access this address space. Is there like a set of similar I/O ports to 0xCF8 and 0xCFC that I write the address to and then the data to?
I tried multiple google searches but I just ended up with results telling me to set the C/BE command lines to the bus and the AD lines to the bus. How do I access these lines and access the PCI I/O space? I have read the PCI wiki page and I am confused on how to proceed after configuration.
Thank you for your help.
PCI Memory and I/O Space
- thepowersgang
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Re: PCI Memory and I/O Space
Solved on IRC.
When you write all ones to a BAR, it will return with only the bits you can change set (excepting bit 0, which is a flag)
Once you know what size the device's address space is (by the bits that remain zero) you can allocate space from the I/O address space and then write that new address to the BAR.
Now it is possible to use the normal IO functions such as inb/outb etc to access the device, by accessing the address you gave it in the BAR.
When you write all ones to a BAR, it will return with only the bits you can change set (excepting bit 0, which is a flag)
Once you know what size the device's address space is (by the bits that remain zero) you can allocate space from the I/O address space and then write that new address to the BAR.
Now it is possible to use the normal IO functions such as inb/outb etc to access the device, by accessing the address you gave it in the BAR.
Kernel Development, It's the brain surgery of programming.
Acess2 OS (c) | Tifflin OS (rust) | mrustc - Rust compiler
Currently Working on: mrustc
Acess2 OS (c) | Tifflin OS (rust) | mrustc - Rust compiler
Currently Working on: mrustc
Re: PCI Memory and I/O Space
Thanks thePowersGang!
Things are making sense now and I am reading the USB status register (yay!).
Things are making sense now and I am reading the USB status register (yay!).