Load TR [TSS, GDT, Tutorial Kernel, Debugging Problem]

[enigma]

Hi, I've just recently working on trying to get a single test TSS loaded so that I might be able to start executing programs soon.

However, I've used the Higher Half kernel tutorial, and when I try to load the TSS, bochs page faults and then triple faults (because I have my IDT loaded after the GDT).

Using objdump, the tss is reported to be initialized at 0xc0104a80 with a size of 0x68.

Boch's full response to it (from the Grub kernel selection screen) is:

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00011748621i[BIOS ] *** int 15h function AX=00c0, BX=0000 not yet supported!
00017274984e[CPU0 ] fetch_raw_descriptor: GDT: index (1f)3 > limit (17)
00017274984i[CPU0 ] CPU is in protected mode (active)
00017274984i[CPU0 ] CS.d_b = 32 bit
00017274984i[CPU0 ] SS.d_b = 32 bit
00017274984i[CPU0 ] EFER   = 0x00000000
00017274984i[CPU0 ] | RAX=0000000000000018  RBX=0000000000030d48
00017274984i[CPU0 ] | RCX=0000000000000040  RDX=0000000000000089
00017274984i[CPU0 ] | RSP=00000000c0108aa0  RBP=00000000c0108aa8
00017274984i[CPU0 ] | RSI=0000000000057990  RDI=0000000000057991
00017274984i[CPU0 ] |  R8=0000000000000000   R9=0000000000000000
00017274984i[CPU0 ] | R10=0000000000000000  R11=0000000000000000
00017274984i[CPU0 ] | R12=0000000000000000  R13=0000000000000000
00017274984i[CPU0 ] | R14=0000000000000000  R15=0000000000000000
00017274984i[CPU0 ] | IOPL=0 id vip vif ac vm RF nt of df if tf SF zf AF PF cf
00017274984i[CPU0 ] | SEG selector     base    limit G D
00017274984i[CPU0 ] | SEG sltr(index|ti|rpl)     base    limit G D
00017274984i[CPU0 ] |  CS:0008( 0001| 0|  0) 00000000 000fffff 1 1
00017274984i[CPU0 ] |  DS:0010( 0002| 0|  0) 00000000 000fffff 1 1
00017274984i[CPU0 ] |  SS:0010( 0002| 0|  0) 00000000 000fffff 1 1
00017274984i[CPU0 ] |  ES:0010( 0002| 0|  0) 00000000 000fffff 1 1
00017274984i[CPU0 ] |  FS:0010( 0002| 0|  0) 00000000 000fffff 1 1
00017274984i[CPU0 ] |  GS:0010( 0002| 0|  0) 00000000 000fffff 1 1
00017274984i[CPU0 ] |  MSR_FS_BASE:0000000000000000
00017274984i[CPU0 ] |  MSR_GS_BASE:0000000000000000
00017274984i[CPU0 ] | RIP=00000000c0100c6e (00000000c0100c6e)
00017274984i[CPU0 ] | CR0=0xe0000011 CR1=0x0 CR2=0x0000000000000068
00017274984i[CPU0 ] | CR3=0x00102000 CR4=0x00000000
00017274984i[CPU0 ] >> ltr ax : 0F00D8
00017274984e[CPU0 ] exception(): 3rd (14) exception with no resolution, shutdown status is 00h, resetting
00017274984i[SYS  ] bx_pc_system_c::Reset(SOFTWARE) called
00017274984i[CPU0 ] cpu software reset

Here's the code that actually loads the GDT (including the TSS):

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gdt_set_gate(0, 0, 0, 0, 0);
gdt_set_gate(1, 0, 0xFFFFFFFF, 0x9A, 0xCF);
gdt_set_gate(2, 0, 0xFFFFFFFF, 0x92, 0xCF);
gdt_set_gate(3, (unsigned long) &tss0, sizeof(tss_t) - 1, 0x89, 0x40);

gdt_flush();

asm volatile("ltr %%ax": : "a" (0x18));

Any ideas as to what I should do?

[Hangin10]

EDIT: The problem is actually completely described by the error message before the register dump in the Bochs output. I must have scrolled right past the first (and only) time I read the OP.

[enigma]

Ah, I got it working. Thanks for pointing out that strange quirk in cr2. Turns out that my GDT and GDT pointer were still expecting a GDT with only four entries.