JamesM's Tutorials: Page Fault

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dracayr
Posts: 3
Joined: Wed Apr 08, 2009 5:12 am

JamesM's Tutorials: Page Fault

Post by dracayr »

hi,

I'm following JamesM's kernel development tutorials, and I'm stuck at chapter 7 - The heap.
When I try to load the heap, I get a page fault ( Interrupt 14, page not present, caused through a write, at 0x10c000)

I traced the Interrupt back to this line:

Code: Select all

heap->index = place_ordered_array( (void*)start, HEAP_INDEX_SIZE, &header_t_less_than);
in create_heap(). The exception doesn't occur in place_ordered_array(), but rather when trying to assign heap->index that value. This is the log:

Code: Select all

00029440000p[XGUI ] >>PANIC<< POWER button turned off.
00029440000i[CPU0 ] CPU is in protected mode (active)
00029440000i[CPU0 ] CS.d_b = 32 bit
00029440000i[CPU0 ] SS.d_b = 32 bit
00029440000i[CPU0 ] EFER   = 0x00000000
00029440000i[CPU0 ] | RAX=0000000000000000  RBX=000000000010c000
00029440000i[CPU0 ] | RCX=00000000000b8000  RDX=00000000000003d5
00029440000i[CPU0 ] | RSP=0000000000067d38  RBP=0000000000067d40
00029440000i[CPU0 ] | RSI=0000000000053c8e  RDI=0000000000053c8f
00029440000i[CPU0 ] |  R8=0000000000000000   R9=0000000000000000
00029440000i[CPU0 ] | R10=0000000000000000  R11=0000000000000000
00029440000i[CPU0 ] | R12=0000000000000000  R13=0000000000000000
00029440000i[CPU0 ] | R14=0000000000000000  R15=0000000000000000
00029440000i[CPU0 ] | IOPL=0 id vip vif ac vm rf nt of df if tf sf ZF af PF cf
00029440000i[CPU0 ] | SEG selector     base    limit G D
00029440000i[CPU0 ] | SEG sltr(index|ti|rpl)     base    limit G D
00029440000i[CPU0 ] |  CS:0008( 0001| 0|  0) 00000000 000fffff 1 1
00029440000i[CPU0 ] |  DS:0010( 0002| 0|  0) 00000000 000fffff 1 1
00029440000i[CPU0 ] |  SS:0010( 0002| 0|  0) 00000000 000fffff 1 1
00029440000i[CPU0 ] |  ES:0010( 0002| 0|  0) 00000000 000fffff 1 1
00029440000i[CPU0 ] |  FS:0010( 0002| 0|  0) 00000000 000fffff 1 1
00029440000i[CPU0 ] |  GS:0010( 0002| 0|  0) 00000000 000fffff 1 1
00029440000i[CPU0 ] |  MSR_FS_BASE:0000000000000000
00029440000i[CPU0 ] |  MSR_GS_BASE:0000000000000000
00029440000i[CPU0 ] | RIP=0000000000100b42 (0000000000100b42)
00029440000i[CPU0 ] | CR0=0xe0000011 CR1=0x0 CR2=0x000000000010c000
00029440000i[CPU0 ] | CR3=0x00107000 CR4=0x00000000
00029440000i[CPU0 ] >> jmp .+0xfffffffe (0x00100b42) : EBFE
00029440000i[CMOS ] Last time is 1239221138 (Wed Apr  8 22:05:38 2009)
00029440000i[XGUI ] Exit
00029440000i[     ] restoring default signal behavior
00029440000i[CTRL ] quit_sim called with exit code 1
EDIT: I just looked through the page-fault code again and realized that it outputs "present" when the page is not present (->bug?). And read-only only means that the operation was caused by a write. So it tries to write to a non-mapped area..

Thanks in advance,
dracayr
dracayr
Posts: 3
Joined: Wed Apr 08, 2009 5:12 am

Re: JamesM's Tutorials: Page Fault

Post by dracayr »

I already did that. The tutorial uses a total memory of 0x1000000 (=0x1000 Pages), I changed that value to 0x4000000 (=0x4000 Pages). In either case, 0x10c000 should be mapped..

dracayr
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Re: JamesM's Tutorials: Page Fault

Post by Creature »

Are you sure the addresses are page-aligned?
When the chance of succeeding is 99%, there is still a 50% chance of that success happening.
dracayr
Posts: 3
Joined: Wed Apr 08, 2009 5:12 am

Re: JamesM's Tutorials: Page Fault

Post by dracayr »

yes, the addresses are page-aligned

EDIT:OK, got it. I downloaded the complete source from the tutorial, and noticed this change:

while (i < pl_address+0x1000)

dracayr
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