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static void read_msr(int msr, int *a, int* d) {
asm volatile ("rdmsr": "=a" (*a), "=d" (*d): "c" (msr) : );
}
... snip ...
// somewhere in kmain
int eax = 0, edx = 0;
read_msr(0x277, &eax, &edx);
It is being compiled with
g++ -O0 -Wall -c -Wextra -nostdlib -nostartfiles -nodefaultlibs -fno-rtti -fno-builtin -fno-exceptions -fomit-frame-pointer -MMD -MP -MF"src/kernel.d" -MT"src/kernel.d" -o"src/kernel.o" "../src/kernel.cpp"
I am testing this on VMware workstation, and according to CPUID it *does* support MSR.
This is from the Intel Documenation
Reads the contents of a 64-bit model specific register (MSR) specified in the ECX
register into registers EDX:EAX. (On processors that support the Intel 64 architec-
ture, the high-order 32 bits of RCX are ignored.) The EDX register is loaded with the
high-order 32 bits of the MSR and the EAX register is loaded with the low-order 32
bits. (On processors that support the Intel 64 architecture, the high-order 32 bits of
each of RAX and RDX are cleared.) If fewer than 64 bits are implemented in the MSR
being read, the values returned to EDX:EAX in unimplemented bit locations are
undefined.
This instruction must be executed at privilege level 0 or in real-address mode; other-
wise, a general protection exception #GP(0) will be generated. Specifying a reserved
or unimplemented MSR address in ECX will also cause a general protection excep-
tion.
Mine only supports very limited hardware -- I tried for least common denominator, but even with that practically every device didn't work! I'm fixing them, but I'm wondering if very few people get my operating system working on their hardware.
