Paging question

[samoz]

Hi guys, I'm working on paging and using JamesM's tutorial and Intel manuals for reference.

I was reading over James' tutorial and I have a question about it. Here is James' code for a page:

Code: Select all

typedef struct page
{
   u32int present    : 1;   // Page present in memory
   u32int rw         : 1;   // Read-only if clear, readwrite if set
   u32int user       : 1;   // Supervisor level only if clear
   u32int accessed   : 1;   // Has the page been accessed since last refresh?
   u32int dirty      : 1;   // Has the page been written to since last refresh?
   u32int unused     : 7;   // Amalgamation of unused and reserved bits
   u32int frame      : 20;  // Frame address (shifted right 12 bits)
} page_t;

The Intel manual defines a write-through and a cache disabled bit between the user and accessed bit in the above code. I see that these bits are moved into the unused bit field, but won't this cause the bits to be ordered incorrectly? Can anyone give me some pointers on this? Because it looks like there is something wrong with grouping 7 bits together as unused to me.

Thanks!

[Hangin10]

When in doubt, use the manual.

[Combuster]

Yes, that looks wrong to me as well

[tarrox]

Jeah it is kind of false. If you want here is my corrected version:

Code: Select all

	typedef struct
	{
		u32int present		: 1;	//
		u32int rw		: 1;	//read/write
		u32int user		: 1;	//1 = User, 0 = Supervisor
		u32int write_through: 1;	//
		u32int cache		: 1;	//
		u32int accessd		: 1;	//
		u32int dirty		: 1;	//Reserved
		u32int attributes	: 1;	//Size of the page 0 = 4096
		u32int global		: 1;	//Ignore
		u32int avail		: 3;	//for the programmer
		u32int frame		: 20;	//
	} page_t;