TSS Question

[System123]

I have looked through old posts on the forum and have checked the Intel manuals but I can't find the answer to my question. I am setting up my TSS in my GDT but I don't know what the Ganularity and Accessiblity values must be. so far I have this in my GDT

Code: Select all

SetGDTGate(0,0,0,0,0); // nil descriptor
  SetGDTGate(1,0,$FFFFFFFF,$9A,$CF); // Kernel space code
  SetGDTGate(2,0,$FFFFFFFF,$92,$CF); // Kernel space data
  SetGDTGate(3,0,$FFFFFFFF,$FA,$CF); // User space code
  SetGDTGate(4,0,$FFFFFFFF,$F2,$CF); // User space data
  SetGDTGate(5,PtrUInt(TSS),SizeOf(TSS)-1, Access??, Gran??);

[quirck]

Granularity bit stands for multiplying limit by 4K. Here this is not necessary => we have gran = $40 (32-bit, upper bits of limit are zero).
Access byte must include: P = 1 (present), DPL = 0, S = 0 (system), Type = 9 (32-bit available TSS). Thus, access = $89.

[System123]

Thanks.

[System123]

I now have my tss installed in the gdt. But when i try call ltr the cpu tripple faults. What value should be used with ltr? Like lgdt you use the gdt pointer which contains a limit and a base what does ltr use?

[Brendan]

Hi,

I now have my tss installed in the gdt. But when i try call ltr the cpu tripple faults. What value should be used with ltr? Like lgdt you use the gdt pointer which contains a limit and a base what does ltr use?

LTR is like LLDT - you use an offset in the GDT to refer to the corresponding GDT entry. For example, if the GDT has a NULL entry then the TSS entry (then other entries) you'd do "mov eax,0x0008; ltr ax".


Cheers,

Brendan

[Love4Boobies]

Note however that the use of hardware-based task switching is ill advised - it's slower than software and support for TSS's is dropped for 64-bit modes altogether.

[System123]

Don't you still need 1 TSS for Software based switching? Because that is what I am trying to implement however all the docs I have read say you need a TSS.

[pcmattman]

Correct, if you plan to be switching to and from user-mode code.

[Combuster]

Basically, the TSS is used when entering ring 0 from ring 3. If its broken (or absent) when the processor needs it, it will reset instead. During this jump the CPU will grab two entries: SS0 and ESP0, so that's the only part you need to do.

[System123]

I initialized my TSS with SS0 = 0x10 and Esp0 = the start of the kernel stack. But when i ltr 0x0028 (the gdt segment with it in) i get a general protection fault? Any common reasons?
I think it is due to my access byte being 0x89? As this makes the dpl = 2?

[Combuster]

Could you tell us what bochs has to say/complain about it?

[System123]

Don't worry I found the problem. I had my granularity and access byte mixed up. It works fine now.