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There's no 'jmp ptr16:64' instruction. The assumption is that you'd never want to change cs with a jmp in long mode as flat segments are expected anyway. You can encode the jmp ptr16:32 instruction from a [BITS 32] section to a [BITS 64] section in order to make the initial switch from compatibility mode to long mode.
I've just tried that technique (albeit assembled under yasm but it should produce the same code) in my bootloader and it seemed to work fine. Are you definitely in 64-bit long mode (not compatibility), cs.l = 1, cs.d = 0 and assembling in a section with the BITS 64 directive?
Regards,
John.
edit: I note you've just edited your post to change the error message that's produced. The new one seems to imply the error is with the lgdt instruction? If not, suggest you use bochs debugger and examine the value of rax after the lea instruction.
jnc100 wrote:I've just tried that technique (albeit assembled under yasm but it should produce the same code) in my bootloader and it seemed to work fine. Are you definitely in 64-bit long mode (not compatibility), cs.l = 1, cs.d = 0 and assembling in a section with the BITS 64 directive?
Regards,
John.
edit: I note you've just edited your post to change the error message that's produced. The new one seems to imply the error is with the lgdt instruction? If not, suggest you use bochs debugger and examine the value of rax after the lea instruction.
yasm implemnts 64-bit instructions and addresses difrently from NASM
.................................. um what should i put here .............................?..........................................
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build
|
|- Makefile
|- kernel
|- load.o <-- is put in build directory when it should be in asm
kernel
|
|- asm
|- load.s
|- (load.o) <-- load.o should be here
|- kMain.c
|- kMain.o
Er, no. I don't think so. How did you manage to generate those values? I suggest you break it down field by field and decide exactly what you want to put in each field.
.................................. um what should i put here .............................?..........................................
..... ................
Firstly, have you done a CLI? If not, do you have a valid 64 bit IDT loaded (which handles exceptions and IRQ's at minimum)? If so, check that your IDT entries are really all valid 64 bit versions (even if you are in compatibility mode).
Secondly, the original error you had:
00009322702e[CPU0 ] LGDT64_Ms: loaded base64 address is not in canonical form!
00009322702e[CPU0 ] interrupt(long mode): IDT entry extended attributes DWORD4 TYPE != 0
is because 64 bit modes require all pointers to be in canonical form. This means that the MSB's of the pointer must all be the same as the last valid MSB (this means bit 47 for the first long mode implementation).