GPF with Interrupts greater than 31 (solved)

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VendettA_01
Posts: 2
Joined: Wed Oct 04, 2006 2:44 am

GPF with Interrupts greater than 31 (solved)

Post by VendettA_01 »

At this point I have absolutly no idea what this wierd problem could cause.
So the Problem I faced is that I wanted to get IRQ's working. IDT is correctly set up I checked that several times. I got the Exception Handlers working corectly and if I remap the PIC on a base adress lower than 32 than there are no problems. But as soon as I exceed the 'magical' 31 border there is always a General Protection Fault.
The PIC couldn't cause the problem because I tested it with the int Opcode and it ends in the same failure. It's like the uper Interrupts are a kind of disabled but I haven't found any hint in the Intel documents.

If anyone has an idea how this could be solved I would be very grateful:)
VendettA_01
Posts: 2
Joined: Wed Oct 04, 2006 2:44 am

Post by VendettA_01 »

I spent the last days tracking down the failure and now I got THE idea why that happend. I've set the IDT Limit to 0xFF but that means I enabled the first 31 interrupts because 0x100 / 8d = 32d! This caused all my trouble. Should be 0xFFFF to enable all. Perhaps there is someone I could help with that:)
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