what data is passed when an exception is handles.
lets say the exception is a divide error exception.
the system would call the appropriate code throu the ivt - entry 0
what is the data structure that it pushes onto the stack when calling the appropriate handler. (error code, ip, cs, etc)
16bit exception handling question
I'd assume it would be the same as in protected mode, but there's no task switching and CPL stuff... So, all you're basically asking is what the INT opcode does in real mode.
See http://pdos.csail.mit.edu/6.828/2005/re ... 86/INT.htm. It pushes the FLAGS, clears IF/TF, pushes CS, IP. There are no error codes, as exceptions like #PF don't exist.
A list of hardware/software interrupts in real/protected mode can be found here: http://www.bioscentral.com/misc/interrupts.htm. I'd say to ignore any of those that have something like (80386) after them and stick with the ones on the original 8086.
See http://pdos.csail.mit.edu/6.828/2005/re ... 86/INT.htm. It pushes the FLAGS, clears IF/TF, pushes CS, IP. There are no error codes, as exceptions like #PF don't exist.
A list of hardware/software interrupts in real/protected mode can be found here: http://www.bioscentral.com/misc/interrupts.htm. I'd say to ignore any of those that have something like (80386) after them and stick with the ones on the original 8086.
"Sufficiently advanced stupidity is indistinguishable from malice."
Hi,
Just a quick note...
Cheers,
Brendan
Just a quick note...
A general protection fault is entirely possible in real mode (the CPU won't push an error code on the stack for any exception in real mode, probably because of backward compatability).karekare0 wrote:There are no error codes, as exceptions like #PF don't exist.
Cheers,
Brendan
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You can remap the PICs so that they do not conflict. The code below will map IRQs 0 to 15 to IDT entries 32 to 47:
out8 is the same as outb/outportb.
Code: Select all
out8(0x20, 0x11);
out8(0xA0, 0x11);
out8(0x21, 0x20);
out8(0xA1, 0x28);
out8(0x21, 0x04);
out8(0xA1, 0x02);
out8(0x21, 0x01);
out8(0xA1, 0x01);
out8(0x21, 0x0);
out8(0xA1, 0x0);
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STFW http://www.osdev.org/wiki/PIC
Anyway the commands basically program both PICs to trigger IRQs using different interrupts (32-47) instead of the ones in use at 0-15.
Anyway the commands basically program both PICs to trigger IRQs using different interrupts (32-47) instead of the ones in use at 0-15.
"Sufficiently advanced stupidity is indistinguishable from malice."