Hi,
After looking at the BIOS binary of Bochs, I am wondering what is the limited size of the PC BIOS?
I always think that we have only 64KB for BIOS, which is placed at the last 64KB of 1MB boundary. However, the BIOS-bochs-latest in Bochs is 128KB. How is that possible?
I heard that recently the BIOS size can be increased to something like 512KB (dont remember where I heard that). Is that correct? If it is, how PC can handle the large BIOS with only 64KB area?
Thank you,
J
BIOS size?
Re: BIOS size?
Hi,
For modern 80x86 computers the BIOS ROM is just below 4 GB. When the computer boots it does POST, etc, then copies part of itself to RAM (just below 1 MB) , then uses the chipset to lock the RAM just below 1 MB (e.g. make it so writes are ignored).
AFAIK there is no fixed limit for the size of the ROM itself. But; local APICs are normally from 0xFEE00000 to 0xFEE00FFF, so in practice you'll probably never find a ROM that's larger than 16 MB (e.g. 0xFF000000 to 0xFFFFFFFF).
However, flash ROM costs money, so hardware manufacturers will use the smallest chips they can. At the moment (AFAIK) 256 KB or 512 KB is fairly normal. You probably won't find any ROM chips larger than that unless/until the BIOS needs to be much more bloated (except for special purpose situations, like embedded systems).
Note: For Bochs itself, it probably wouldn't be hard to modify Bochs to support an *emulated* 2 GB BIOS ROM...
Cheers,
Brendan
For modern 80x86 computers the BIOS ROM is just below 4 GB. When the computer boots it does POST, etc, then copies part of itself to RAM (just below 1 MB) , then uses the chipset to lock the RAM just below 1 MB (e.g. make it so writes are ignored).
AFAIK there is no fixed limit for the size of the ROM itself. But; local APICs are normally from 0xFEE00000 to 0xFEE00FFF, so in practice you'll probably never find a ROM that's larger than 16 MB (e.g. 0xFF000000 to 0xFFFFFFFF).
However, flash ROM costs money, so hardware manufacturers will use the smallest chips they can. At the moment (AFAIK) 256 KB or 512 KB is fairly normal. You probably won't find any ROM chips larger than that unless/until the BIOS needs to be much more bloated (except for special purpose situations, like embedded systems).
Note: For Bochs itself, it probably wouldn't be hard to modify Bochs to support an *emulated* 2 GB BIOS ROM...
Cheers,
Brendan
For all things; perfection is, and will always remain, impossible to achieve in practice. However; by striving for perfection we create things that are as perfect as practically possible. Let the pursuit of perfection be our guide.
Hi Brendan,
Can you make it more clear here? I am a bit confused ....
Because we have only *1MB* memory that is reachable in real-mode, how can we have big size of BIOS, like 16MB as you said? In that case, where in the memory we keep the BIOS??
I always think that BIOS must be in the 1MB area, and the entry point of BIOS stays within the last 64KB of 1MB. Perhaps I am wrong here ???
Many thanks,
J
Can you make it more clear here? I am a bit confused ....
Because we have only *1MB* memory that is reachable in real-mode, how can we have big size of BIOS, like 16MB as you said? In that case, where in the memory we keep the BIOS??
I always think that BIOS must be in the 1MB area, and the entry point of BIOS stays within the last 64KB of 1MB. Perhaps I am wrong here ???
Many thanks,
J
Hi,
The more complicated answer is that real mode itself is a hallucination (something that the CPU pretends exists, that doesn't actually exist at the lowest levels of the CPU)...
To understand this, you need to understand that internally the CPU operates on descriptor caches that describe the attributes of a segment (rather than what we see as segments). These descriptor caches are hidden from (most) software, and include a segment base address, segment limit, segment type, segment attributes, etc (for each segment register).
Normally when we load a value into a segment register the CPU sets the corresponding descriptor cache to appropriate values. However, when the CPU first starts the descriptor caches are set to "default" values, and the CPU designers can set the (segment base address, segment limit, segment type, segment attributes, etc) values in the descriptor cache to whatever they like.
More specifically, when a CPU first starts, the CPU designers set "CS base" to 0xFFFF0000, which is impossible for us to do (but possible for them). EIP/IP is still set to 0xFFF0, so the first instruction executed by a CPU is at 0xFFFFFFF0 (or "0xFFFF000:0xFFF0" in real mode style addressing).
As long as the BIOS ROM (just below 4 GB) doesn't try to reload CS then "CS base" stays the same. Most BIOSs probably do a near JMP to some code that switches to protected mode (and then switch back to real mode just before attempting to boot an OS's boot loader).
This is partly because there's lots of code for initializing and testing hardware (e.g. RAM controllers, northbridge, southbridge, etc), for building ACPI and MPS tables, for doing the "press F1 to enter setup" configuration, for setting up IRQ routing, for autodetecting hard disk sizes, etc. None of this code needs to be below 1 MB, so they leave it all below 4 GB and only copy what's needed (the "run-time" part) below 1 MB.
Note 1: If you're familiar with "unreal mode" you'll realise it works by playing tricks with the values in the CPU's descriptor caches.
Note 2: You are right for 80286 and older CPUs (they did start at 0x000FFFF0 and did use a BIOS below 1 MB). AFAIK for the 80386 (and/or 80486?) there was a CPU pin which determined where the CPU's first instruction is (so the motherboard manufacturer could do it the old way or the new way, depending on how they wired this CPU pin). Modern CPUs start at 0xFFFFFFF0.
Cheers,
Brendan
The simple answer is that the BIOS doesn't start in real mode.junkoi wrote:Because we have only *1MB* memory that is reachable in real-mode, how can we have big size of BIOS, like 16MB as you said? In that case, where in the memory we keep the BIOS??
The more complicated answer is that real mode itself is a hallucination (something that the CPU pretends exists, that doesn't actually exist at the lowest levels of the CPU)...
To understand this, you need to understand that internally the CPU operates on descriptor caches that describe the attributes of a segment (rather than what we see as segments). These descriptor caches are hidden from (most) software, and include a segment base address, segment limit, segment type, segment attributes, etc (for each segment register).
Normally when we load a value into a segment register the CPU sets the corresponding descriptor cache to appropriate values. However, when the CPU first starts the descriptor caches are set to "default" values, and the CPU designers can set the (segment base address, segment limit, segment type, segment attributes, etc) values in the descriptor cache to whatever they like.
More specifically, when a CPU first starts, the CPU designers set "CS base" to 0xFFFF0000, which is impossible for us to do (but possible for them). EIP/IP is still set to 0xFFF0, so the first instruction executed by a CPU is at 0xFFFFFFF0 (or "0xFFFF000:0xFFF0" in real mode style addressing).
As long as the BIOS ROM (just below 4 GB) doesn't try to reload CS then "CS base" stays the same. Most BIOSs probably do a near JMP to some code that switches to protected mode (and then switch back to real mode just before attempting to boot an OS's boot loader).
This is partly because there's lots of code for initializing and testing hardware (e.g. RAM controllers, northbridge, southbridge, etc), for building ACPI and MPS tables, for doing the "press F1 to enter setup" configuration, for setting up IRQ routing, for autodetecting hard disk sizes, etc. None of this code needs to be below 1 MB, so they leave it all below 4 GB and only copy what's needed (the "run-time" part) below 1 MB.
Note 1: If you're familiar with "unreal mode" you'll realise it works by playing tricks with the values in the CPU's descriptor caches.
Note 2: You are right for 80286 and older CPUs (they did start at 0x000FFFF0 and did use a BIOS below 1 MB). AFAIK for the 80386 (and/or 80486?) there was a CPU pin which determined where the CPU's first instruction is (so the motherboard manufacturer could do it the old way or the new way, depending on how they wired this CPU pin). Modern CPUs start at 0xFFFFFFF0.
Cheers,
Brendan
For all things; perfection is, and will always remain, impossible to achieve in practice. However; by striving for perfection we create things that are as perfect as practically possible. Let the pursuit of perfection be our guide.
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Masterkiller
- Member
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- Joined: Sat May 05, 2007 6:20 pm
On the 8086 and 8088 machines the BIOS ROM is truely limited to 64KB. Your information is valid but real-mode as Brendan said is just emolation or this machines to start a OS for them. The computer starts in protected-mode with all address line support. BIOS just copy all required code in 1MB memory (which can be more than 64KB, for example 0xE0000 to 0xFFFFF). After that it disables A20 line and clears all PE in cr0. Then you can enable A20 line and try to read/write memory above 1MB. The descriptor loaded into segment register forbids that and an excepton could be raised. BIOS handles CPU exception and allow your boot program to continue but the instructuion tried to access above 1MB memory is ignored, so read/write is ignored. The PE bit cleared also prevent writing the invisible part of segment registers
If you want to determine the size of ROM BIOS code (not the BIOS code), you can use AX=E820h; INT 15h; The last block of memory returned should be physical address of ROM BIOS.
If you want to determine the size of ROM BIOS code (not the BIOS code), you can use AX=E820h; INT 15h; The last block of memory returned should be physical address of ROM BIOS.