PCI "Mass Storage" Code

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essial
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PCI "Mass Storage" Code

Post by essial »

I'm enumerating the PCI bus, and I'm detecting if the device is "Mass Storage" or not; and I do so by checking to see if the device's classcode = PCI_CLASSCODE_MassStorageController or not. Here is my results inside of VMWare:

Image

SCSI Host Adaptor looks right, but what about the bridges? I know I still need to do enumeration across the bridges, but are the bridges themselves supposed to be marked as mass storage? Are they marked as mass storage because one of the sub devices is also mass storage? Or am I simply reading the classcode wrong?
jtlb
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Post by jtlb »

Are you parsing all the devices functions? For example, in qemu, the ide controller is at 0:1:1. And i also think you are not reaing the good field. Are you reading the class or subclass field?
essial
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Post by essial »

I finally have it parsing correctly. Now I have a secondary question. I have read about the BAR (base address registers), as well as the different PCI commands that can be sent. I also have the Configuration space stuff coded in now (including detecting what features the device supports, as well as the current device statuses). What I do not understand from the PCI-SIG manual is what exactly the BARs are used for. I thought I did, but the existence of the I/O and memory read commands confused me on this matter.
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bewing
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Post by bewing »

The BAR can contain a pointer to a "command list" in memory, for example. This is needed for UDMA or ADMA disk drivers.
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